公开(公告)号：US09141426B2

公开(公告)日：2015-09-22

申请号：US13631831

申请日：2012-09-28

Applicant: Intel Corporation

Inventor： Malini K. Bhandaru ,  Matthew M. Bace ,  A Leonard Brown ,  Ian M. Steiner ,  Vivek Garg ,  Eric Dehaemer ,  Scott P. Bobholz

IPC: G06F9/46 ,  G06F9/48 ,  G06F11/34 ,  G06F1/32

CPC classification number: G06F9/4881 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/3287 ,  G06F11/3409 ,  G06F2201/865 ,  G06F2201/88 ,  Y02D10/126 ,  Y02D10/152 ,  Y02D10/171

Abstract: A processor is described that includes a processing core and a plurality of counters for the processing core. The plurality of counters are to count a first value and a second value for each of multiple threads supported by the processing core. The first value reflects a number of cycles at which a non sleep state has been requested for the first value's corresponding thread, and, a second value that reflects a number of cycles at which a non sleep state and a highest performance state has been requested for the second value's corresponding thread. The first value's corresponding thread and the second value's corresponding thread being a same thread.

Abstract translation: 描述了一种包括处理核心和用于处理核心的多个计数器的处理器。 多个计数器将对由处理核心支持的多个线程中的每个线程计数第一值和第二值。 第一个值反映已经为第一个值对应的线程请求了非睡眠状态的多个周期，以及反映已经请求非睡眠状态和最高性能状态的周期数的第二个值 第二个值的相应线程。 第一个值的相应线程和第二个值的相应线程是相同的线程。