公开(公告)号：US20170177496A1

公开(公告)日：2017-06-22

申请号：US14972053

申请日：2015-12-16

Applicant: Intel Corporation

Inventor： Woojong HAN ,  Andy M. RUDOFF ,  Mark A. SCHMISSEUR ,  Richard P. MANGOLD

IPC: G06F12/10 ,  G06F12/08

CPC classification number: G06F12/1009 ,  G06F12/0238 ,  G06F12/0873 ,  G06F12/0877 ,  G06F12/0893 ,  G06F12/1441 ,  G06F2212/1052 ,  G06F2212/152 ,  G06F2212/312 ,  G06F2212/608 ,  G06F2212/7201 ,  G06F2212/7203

Abstract: Provided are an apparatus and method for using block windows configured in a memory module to provide block level access to memory chips in the memory module. A plurality of block windows are configured that map to addresses corresponding to the addressable locations in the memory chips. A read/write request is received indicating a requested read or write operation with respect to a target block window comprising one of the block windows. The requested read or write operation is performed with respect to the addresses that map to the target block window.

公开(公告)号：US20190179764A1

公开(公告)日：2019-06-13

申请号：US16278509

申请日：2019-02-18

Applicant: Intel Corporation

Inventor： Zhe WANG ,  Alaa R. ALAMELDEEN ,  Lidia WARNES ,  Andy M. RUDOFF ,  Muthukumar P. SWAMINATHAN

IPC: G06F12/0891 ,  G06F12/0893 ,  G06F12/02

Abstract: A two-level main memory that includes a persistent memory and a cache is provided. Locations of dirty cache lines in the cache are tracked through the use a dirty cache line tracker. The dirty cache line tracker is stored in the cache and can be cached in a memory controller for the persistent memory. The dirty cache line tracker can be used to bypass cache lookup, perform efficient dirty cache line scrubbing and to decouple battery power and capacity of the cache in the two-level main memory.