公开(公告)号：US20250006810A1

公开(公告)日：2025-01-02

申请号：US18216514

申请日：2023-06-29

Applicant: Intel Corporation

Inventor： Shao-Ming Koh ,  Manish Chandhok ,  Marvin Paik ,  Shahidul Haque ,  Jason Klaus ,  Asad Iqbal ,  Patrick Morrow ,  Nikhil Mehta ,  Alison Davis ,  Sean Pursel ,  Steven Shen ,  Christopher Rochester ,  Matthew Prince

IPC: H01L29/423 ,  H01L21/28 ,  H01L21/3213 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775

Abstract: Transistor structures with gate material self-aligned to underlying channel material. A channel mask material employed for patterning channel material is retained during selective formation of a second mask material upon exposed surfaces of gate material. The channel mask material is then thinned to expose a sidewall of adjacent gate material. The exposed gate material sidewall is laterally recessed to expand an opening beyond an edge of underlying channel material. A third mask material may be formed in the expanded opening to protect an underlying portion of gate material during a gate etch that forms a trench bifurcating the underlying portion of gate material from an adjacent portion of gate material. The underlying portion of gate material extends laterally beyond the channel material by an amount that is substantially symmetrical about a centerline of the channel material and this amount has a height well controlled relative to the channel material.

公开(公告)号：US10483160B2

公开(公告)日：2019-11-19

申请号：US15745235

申请日：2015-09-23

Applicant: Intel Corporation

Inventor： Jeffery D. Bielefeld ,  Manish Chandhok ,  Asad Iqbal ,  John D. Brooks

IPC: H01L21/768 ,  H01L21/764 ,  H01L23/532 ,  H01L21/02

Abstract: A helmet layer is deposited on a plurality of conductive features on a first dielectric layer on a substrate. A second dielectric layer is deposited on a first portion of the helmet layer. An etch stop layer is deposited on a second portion the helmet layer.