公开(公告)号：US11841776B2

公开(公告)日：2023-12-12

申请号：US16439407

申请日：2019-06-12

Applicant: Intel Corporation

Inventor： Nabajit Deka ,  Riccardo Mariani ,  Asad Azam ,  Roger May ,  Prashanth Gadila

IPC: G06F11/00 ,  G06F11/16 ,  G05B9/02 ,  G06F11/30 ,  G06F13/12 ,  G06F11/07

CPC classification number: G06F11/1641 ,  G05B9/02 ,  G06F11/0796 ,  G06F11/3055 ,  G06F13/122

Abstract: Methods, systems and apparatuses may provide for technology that includes a chip having a first die including a first processing logic to execute a first application instance and generate a first output of the first application instance, and a second processing logic to execute a second application instance and generate a second output of the second application instance. The chip may also include a second die coupled to the first die, wherein the second die includes a safety monitor detect a condition associated with one or more of an error in the first output, an error in the second output, or a discrepancy between the first output and the second output. The safety monitor may also initiate a transition of the chip into a safe state in response to the condition.

公开(公告)号：US20190294125A1

公开(公告)日：2019-09-26

申请号：US16439407

申请日：2019-06-12

Applicant: Intel Corporation

Inventor： Nabajit Deka ,  Riccardo Mariani ,  Asad Azam ,  Roger May ,  Prashanth Gadila

IPC: G05B9/02 ,  G06F13/12 ,  G06F11/30

Abstract: Methods, systems and apparatuses may provide for technology that includes a chip having a first die including a first processing logic to execute a first application instance and generate a first output of the first application instance, and a second processing logic to execute a second application instance and generate a second output of the second application instance. The chip may also include a second die coupled to the first die, wherein the second die includes a safety monitor detect a condition associated with one or more of an error in the first output, an error in the second output, or a discrepancy between the first output and the second output. The safety monitor may also initiate a transition of the chip into a safe state in response to the condition.