公开(公告)号：US20230187356A1

公开(公告)日：2023-06-15

申请号：US17548006

申请日：2021-12-10

Applicant: Intel Corporation

Inventor： Sukru YEMENICIOUGLU ,  Leonard P. GULER ,  Gilbert DEWEY ,  Tahir GHANI

IPC: H01L23/535 ,  H01L29/06 ,  H01L29/165 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L23/535 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/02603 ,  H01L21/02532 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66742

Abstract: Jumper gates for advanced integrated circuit structures are described. For example, an integrated circuit structure includes a first vertical stack of horizontal nanowire segments. A second vertical stack of horizontal nanowire segments is spaced apart from the first vertical stack of horizontal nanowire segments. A conductive structure is laterally between and in direct electrical contact with the first vertical stack of horizontal nanowire segments and with the second vertical stack of horizontal nanowire segments. A first source or drain structure is coupled to the first vertical stack of horizontal nanowire segments at a side opposite the conductive structure. A second source or drain structure is coupled to the second vertical stack of horizontal nanowire segments at a side opposite the conductive structure.