公开(公告)号：US20230258716A1

公开(公告)日：2023-08-17

申请号：US18129315

申请日：2023-03-31

Applicant: Intel Corporation

Inventor： Swadesh Choudhary ,  Debendra Das Sharma ,  Gerald Pasdast ,  Zuogo Wu ,  Narasimha Lanka ,  Lakshmipriya Seshan

IPC: G01R31/3183 ,  G01R31/317

CPC classification number: G01R31/318314 ,  G01R31/31712 ,  G01R31/31718

Abstract: Techniques to perform semiconductor testing are described. Test equipment may test a chiplet for compliance with a semiconductor specification. A test device may connect to a test package with a model chiplet and a device under test (DUT) chiplet. The model chiplet may comprise a known good model (KGM) of the semiconductor specification. The test device may use the model chiplet to test the DUT chiplet. Other embodiments are described and claimed.