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公开(公告)号：US10896976B2
公开(公告)日：2021-01-19
申请号：US16541437
申请日：2019-08-15
发明人： Veeraraghavan S. Basker , Kangguo Cheng , Ali Khakifirooz , Henry K. Utomo , Reinaldo Ariel Vega
IPC分类号： H01L21/8234 , H01L29/78 , H01L29/04 , H01L29/66 , H01L29/06 , H01L21/762 , H01L29/16 , H01L21/02 , H01L29/08 , H01L21/84 , H01L29/417 , H01L27/088 , H01L29/165
摘要： A shallow trench isolation layer is formed on a structure comprising semiconductor fins. Portions of the fins are recessed to a level below the shallow trench isolation layer. Epitaxial stressor regions are then formed on the recessed fin areas. A bottom portion of the epitaxial stressor regions are contained by the shallow trench isolation layer, which delays formation of the diamond shape as the epitaxial region is grown. Once the epitaxial stressor regions exceed the level of the shallow trench isolation layer, the diamond shape starts to form. The result of delaying the start of the diamond growth pattern is that the epitaxial regions are narrower for a given fin height. This allows for taller fins, which provide more current handling capacity, while the narrower epitaxial stressor regions enable a smaller fin pitch, allowing for increased circuit density.
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公开(公告)号：US20150129939A1
公开(公告)日：2015-05-14
申请号：US14076903
申请日：2013-11-11
IPC分类号： H01L29/417 , H01L29/66
CPC分类号： H01L29/66545 , H01L29/66606 , H01L29/78
摘要： Embodiments of the present invention provide an improved structure and method for forming high aspect ratio contacts. A horizontally formed contact etch stop layer is deposited in a narrow area where a contact is to be formed. A gas cluster ion beam (GCIB) process is used in the deposition of the horizontally formed contact etch stop layer.
摘要翻译： 本发明的实施例提供了用于形成高纵横比接触的改进的结构和方法。 水平形成的接触蚀刻停止层沉积在要形成接触的窄区域中。 在水平形成的接触蚀刻停止层的沉积中使用气体簇离子束（GCIB）工艺。
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公开(公告)号：US11139299B2
公开(公告)日：2021-10-05
申请号：US16444386
申请日：2019-06-18
IPC分类号： H01L29/78 , H01L29/66 , H01L29/10 , H01L29/12 , H01L29/165 , H01L27/108
摘要： Embodiments of the present invention provide improved methods and structures for fabrication of capacitor-less DRAM devices, sometimes referred to as ZRAM devices. A channel is formed in a fin-type field effect transistor (finFET) that is comprised of a finned channel portion and a convex channel portion. The finned channel portion may be comprised of a first semiconductor material and the convex channel portion may be comprised of a second, different semiconductor material. In embodiments, a metal gate is disposed around the elongated surface of the channel region, but is not disposed on the short surface of the channel region. A first spacer is disposed adjacent to the gate and in direct physical contact with the short surface of the channel region, and a second spacer is disposed adjacent to the first spacer.
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公开(公告)号：US20190051751A1
公开(公告)日：2019-02-14
申请号：US15672586
申请日：2017-08-09
发明人： Veeraraghavan S. Basker , Kangguo Cheng , Ali Khakifirooz , Henry K. Utomo , Reinaldo Ariel Vega
IPC分类号： H01L29/78 , H01L29/04 , H01L29/66 , H01L29/06 , H01L21/762 , H01L29/16 , H01L21/02 , H01L29/08
摘要： A shallow trench isolation layer is formed on a structure comprising semiconductor fins. Portions of the fins are recessed to a level below the shallow trench isolation layer. Epitaxial stressor regions are then formed on the recessed fin areas. A bottom portion of the epitaxial stressor regions are contained by the shallow trench isolation layer, which delays formation of the diamond shape as the epitaxial region is grown. Once the epitaxial stressor regions exceed the level of the shallow trench isolation layer, the diamond shape starts to form. The result of delaying the start of the diamond growth pattern is that the epitaxial regions are narrower for a given fin height. This allows for taller fins, which provide more current handling capacity, while the narrower epitaxial stressor regions enable a smaller fin pitch, allowing for increased circuit density.
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公开(公告)号：US20180006118A1
公开(公告)日：2018-01-04
申请号：US15199550
申请日：2016-06-30
IPC分类号： H01L29/10 , H01L21/8234 , H01L27/088 , H01L29/78
CPC分类号： H01L21/823412 , H01L21/823487 , H01L27/088 , H01L29/0847 , H01L29/41741 , H01L29/665 , H01L29/66545 , H01L29/66666 , H01L29/7827 , H01L29/78642
摘要： A method and a semiconductor device includes a substrate, and a first device type formed on the substrate, the first device type including an active channel region including a first fin, the first fin including a first fin width which is narrower than a second fin width above and below the active channel region. A second device type can be formed on the same substrate, the second device type includes a second active channel region including a second fin, the second fin including a first fin width which is the same as the second fin width both above and below the second active channel region.
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公开(公告)号：US11056391B2
公开(公告)日：2021-07-06
申请号：US15199550
申请日：2016-06-30
IPC分类号： H01L29/10 , H01L21/8234 , H01L27/088 , H01L29/78 , H01L29/66 , H01L29/417 , H01L29/08 , H01L29/786
摘要： A method and a semiconductor device includes a substrate, and a first device type formed on the substrate, the first device type including an active channel region including a first fin, the first fin including a first fin width which is narrower than a second fin width above and below the active channel region. A second device type can be formed on the same substrate, the second device type includes a second active channel region including a second fin, the second fin including a first fin width which is the same as the second fin width both above and below the second active channel region.
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公开(公告)号：US10559690B2
公开(公告)日：2020-02-11
申请号：US15672586
申请日：2017-08-09
发明人： Veeraraghavan S. Basker , Kangguo Cheng , Ali Khakifirooz , Henry K. Utomo , Reinaldo Ariel Vega
IPC分类号： H01L29/78 , H01L29/04 , H01L29/66 , H01L29/06 , H01L21/762 , H01L29/16 , H01L21/02 , H01L29/08 , H01L21/8234 , H01L21/84 , H01L29/417 , H01L27/088
摘要： A shallow trench isolation layer is formed on a structure comprising semiconductor fins. Portions of the fins are recessed to a level below the shallow trench isolation layer. Epitaxial stressor regions are then formed on the recessed fin areas. A bottom portion of the epitaxial stressor regions are contained by the shallow trench isolation layer, which delays formation of the diamond shape as the epitaxial region is grown. Once the epitaxial stressor regions exceed the level of the shallow trench isolation layer, the diamond shape starts to form. The result of delaying the start of the diamond growth pattern is that the epitaxial regions are narrower for a given fin height. This allows for taller fins, which provide more current handling capacity, while the narrower epitaxial stressor regions enable a smaller fin pitch, allowing for increased circuit density.
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公开(公告)号：US20190304980A1
公开(公告)日：2019-10-03
申请号：US16444386
申请日：2019-06-18
IPC分类号： H01L27/108 , H01L29/78 , H01L29/66 , H01L29/10
摘要： Embodiments of the present invention provide improved methods and structures for fabrication of capacitor-less DRAM devices, sometimes referred to as ZRAM devices. A channel is formed in a fin-type field effect transistor (finFET) that is comprised of a finned channel portion and a convex channel portion. The finned channel portion may be comprised of a first semiconductor material and the convex channel portion may be comprised of a second, different semiconductor material. In embodiments, a metal gate is disposed around the elongated surface of the channel region, but is not disposed on the short surface of the channel region. A first spacer is disposed adjacent to the gate and in direct physical contact with the short surface of the channel region, and a second spacer is disposed adjacent to the first spacer.
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公开(公告)号：US10403628B2
公开(公告)日：2019-09-03
申请号：US14581472
申请日：2014-12-23
IPC分类号： H01L29/66 , H01L29/78 , H01L27/108 , H01L29/10 , H01L29/165 , H01L29/12
摘要： Embodiments of the present invention provide improved methods and structures for fabrication of capacitor-less DRAM devices, sometimes referred to as ZRAM devices. A channel is formed in a fin-type field effect transistor (finFET) that is comprised of a finned channel portion and a convex channel portion. The finned channel portion may be comprised of a first semiconductor material and the convex channel portion may be comprised of a second, different semiconductor material. In embodiments, a metal gate is disposed around the elongated surface of the channel region, but is not disposed on the short surface of the channel region. A first spacer is disposed adjacent to the gate and in direct physical contact with the short surface of the channel region, and a second spacer is disposed adjacent to the first spacer.
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公开(公告)号：US20190252548A9
公开(公告)日：2019-08-15
申请号：US15672586
申请日：2017-08-09
发明人： Veeraraghavan S. Basker , Kangguo Cheng , Ali Khakifirooz , Henry K. Utomo , Reinaldo Ariel Vega
IPC分类号： H01L29/78 , H01L29/04 , H01L29/66 , H01L29/06 , H01L21/762 , H01L29/16 , H01L21/02 , H01L29/08
摘要： A shallow trench isolation layer is formed on a structure comprising semiconductor fins. Portions of the fins are recessed to a level below the shallow trench isolation layer. Epitaxial stressor regions are then formed on the recessed fin areas. A bottom portion of the epitaxial stressor regions are contained by the shallow trench isolation layer, which delays formation of the diamond shape as the epitaxial region is grown. Once the epitaxial stressor regions exceed the level of the shallow trench isolation layer, the diamond shape starts to form. The result of delaying the start of the diamond growth pattern is that the epitaxial regions are narrower for a given fin height. This allows for taller fins, which provide more current handling capacity, while the narrower epitaxial stressor regions enable a smaller fin pitch, allowing for increased circuit density.
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