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公开(公告)号:US20130252559A1
公开(公告)日:2013-09-26
申请号:US13599413
申请日:2012-08-30
申请人: Jun DEGUCHI , Shouhei Kousai , Yousuke Hagiwara , Masamichi Suzuki , Atsuhiro Kinoshita , Takao Marukame
发明人: Jun DEGUCHI , Shouhei Kousai , Yousuke Hagiwara , Masamichi Suzuki , Atsuhiro Kinoshita , Takao Marukame
IPC分类号: H03M1/66
CPC分类号: H03M1/66 , H03M1/1061 , H03M1/745
摘要: In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n−1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.
摘要翻译: 通常,根据一个实施例,配置成将包括n(n> 1)位的数字信号转换为模拟电流以从输出端输出模拟电流的DA转换器包括n个电压 - 电流转换器。 它们中的每一个对应于数字信号的每个位,并且被配置为根据相应的位产生电流。 第k(k是0到n-1的整数)电压 - 电流转换器包括阈值电压可调的第一晶体管。 第一晶体管包括半导体衬底,第一扩散区,第二扩散区,绝缘膜,电荷累积膜和栅极。
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公开(公告)号:US08849219B2
公开(公告)日:2014-09-30
申请号:US13599413
申请日:2012-08-30
申请人: Jun Deguchi , Shouhei Kousai , Yousuke Hagiwara , Masamichi Suzuki , Atsuhiro Kinoshita , Takao Marukame
发明人: Jun Deguchi , Shouhei Kousai , Yousuke Hagiwara , Masamichi Suzuki , Atsuhiro Kinoshita , Takao Marukame
CPC分类号: H03M1/66 , H03M1/1061 , H03M1/745
摘要: In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n−1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.
摘要翻译: 通常,根据一个实施例,配置成将包括n(n> 1)位的数字信号转换为模拟电流以从输出端输出模拟电流的DA转换器包括n个电压 - 电流转换器。 它们中的每一个对应于数字信号的每个位,并且被配置为根据相应的位产生电流。 第k(k是0到n-1的整数)电压 - 电流转换器包括阈值电压可调的第一晶体管。 第一晶体管包括半导体衬底,第一扩散区,第二扩散区,绝缘膜,电荷累积膜和栅极。
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公开(公告)号:US07969237B2
公开(公告)日:2011-06-28
申请号:US12623794
申请日:2009-11-23
申请人: Tetsuya Fujita , Yousuke Hagiwara
发明人: Tetsuya Fujita , Yousuke Hagiwara
IPC分类号: G05F1/10
CPC分类号: H03K19/0016 , H03K19/00361
摘要: A semiconductor integrated circuit device includes at least one first transistor configured to control conductance between an input power line and an output power line, at least one second transistor configured to control conductance between the input power line and the output power line, a first buffer configured to supply a first control signal for driving the at least one first transistor to a first control line connected to the at least one first transistor, a second buffer configured to generate a second control signal for driving the at least one second transistor upon receipt of the first control signal supplied through the first control line and supply the second control signal to a second control line connected to the at least one second transistor, and at least one capacitor connected between the first control line and the output power line.
摘要翻译: 一种半导体集成电路器件,包括:至少一个第一晶体管,被配置为控制输入电源线与输出电源线之间的电导;至少一个第二晶体管,被配置为控制输入电力线与输出电力线之间的电导;第一缓冲器配置 提供用于驱动所述至少一个第一晶体管的第一控制信号到连接到所述至少一个第一晶体管的第一控制线;第二缓冲器,被配置为产生用于在接收到所述至少一个第一晶体管时驱动所述至少一个第二晶体管的第二控制信号 第一控制信号通过第一控制线提供并将第二控制信号提供给连接到至少一个第二晶体管的第二控制线,以及连接在第一控制线和输出电源线之间的至少一个电容器。
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公开(公告)号:US20100259316A1
公开(公告)日:2010-10-14
申请号:US12623794
申请日:2009-11-23
申请人: Tetsuya Fujita , Yousuke Hagiwara
发明人: Tetsuya Fujita , Yousuke Hagiwara
IPC分类号: G05F1/10
CPC分类号: H03K19/0016 , H03K19/00361
摘要: A semiconductor integrated circuit device includes at least one first transistor configured to control conductance between an input power line and an output power line, at least one second transistor configured to control conductance between the input power line and the output power line, a first buffer configured to supply a first control signal for driving the at least one first transistor to a first control line connected to the at least one first transistor, a second buffer configured to generate a second control signal for driving the at least one second transistor upon receipt of the first control signal supplied through the first control line and supply the second control signal to a second control line connected to the at least one second transistor, and at least one capacitor connected between the first control line and the output power line.
摘要翻译: 一种半导体集成电路器件,包括:至少一个第一晶体管,被配置为控制输入电源线与输出电源线之间的电导;至少一个第二晶体管,被配置为控制输入电力线与输出电力线之间的电导;第一缓冲器配置 提供用于驱动所述至少一个第一晶体管的第一控制信号到连接到所述至少一个第一晶体管的第一控制线;第二缓冲器,被配置为产生用于在接收到所述至少一个第一晶体管时驱动所述至少一个第二晶体管的第二控制信号 第一控制信号通过第一控制线提供并将第二控制信号提供给连接到至少一个第二晶体管的第二控制线,以及连接在第一控制线和输出电源线之间的至少一个电容器。
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