MEMORY SYSTEM
    1.
    发明公开
    MEMORY SYSTEM 审中-公开

    公开(公告)号:US20240031588A1

    公开(公告)日:2024-01-25

    申请号:US18479521

    申请日:2023-10-02

    CPC classification number: H04N19/423 H04N19/146 H04N19/13 H04N19/184

    Abstract: According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.

    COMPRESSION DEVICE, DECOMPRESSION DEVICE, AND METHOD

    公开(公告)号:US20210288662A1

    公开(公告)日:2021-09-16

    申请号:US17010013

    申请日:2020-09-02

    Abstract: According to one embodiment, a compression device includes a dictionary based encoder, a second buffer, a comparator, and a compression data generator. The dictionary based encoder searches for second data at least partially matching first data from a first buffer, and acquires a first match position indicating a position of the second data in the first buffer and a match length indicating a matched length of the first and second data. The second buffer stores the previously acquired second match position with an index. The compression data generator generates first compressed data that includes the index assigned to the second match position in the second buffer and the match length when the first match position matches the second match position in the second buffer.

    MEMORY SYSTEM
    3.
    发明申请

    公开(公告)号:US20210289217A1

    公开(公告)日:2021-09-16

    申请号:US17019941

    申请日:2020-09-14

    Abstract: According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.

    DICTIONARY COMPRESSOR, DATA COMPRESSION DEVICE, AND MEMORY SYSTEM

    公开(公告)号:US20230403027A1

    公开(公告)日:2023-12-14

    申请号:US18118732

    申请日:2023-03-07

    CPC classification number: H03M7/3088 H03M7/4031

    Abstract: According to one embodiment, a dictionary compressor for compressing input first data includes a buffer and a search unit. The buffer stores data input to the dictionary compressor prior to the first data.
    The search unit acquires, from the first data, partial data strings each having a first data length and having head positions in the first data, respectively, that are sequentially shifted by a second data length shorter than the first data length. The search unit performs search processes in parallel and acquires search results respectively corresponding to the search processes, the search processes searching the buffer to acquire respective match data strings that at least partially match the partial data strings, respectively.

    ERROR DETECTION IN MEMORY SYSTEM
    5.
    发明申请

    公开(公告)号:US20230087517A1

    公开(公告)日:2023-03-23

    申请号:US17680128

    申请日:2022-02-24

    Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to, during a writing operation, generate a first error-detecting code from data that is input, perform a predetermined conversion on the data into first conversion data, generate a second error-detecting code from the first conversion data, and store the data, the first error-detecting code, and the second-error detecting code in the non-volatile memory. The controller is configured to during a read operation, read the data, the first error-detecting code, and the second error-detecting code from the non-volatile memory, perform a first error detection on the data using the first error-detecting code, perform the predetermined conversion on the data into second conversion data, perform a second error detection on the second conversion data using the second error-detecting code, and output the second conversion data based on results of the first and second error detections.

    CHARACTER STRING SEARCH DEVICE AND MEMORY SYSTEM

    公开(公告)号:US20220255556A1

    公开(公告)日:2022-08-11

    申请号:US17472431

    申请日:2021-09-10

    Abstract: According to one embodiment, a buffer stores first hash values and first complementary data. A first conversion unit converts consecutive characters in a second character string into second hash values and second complementary data. A search unit searches for consecutive first hash values from the buffer, and output a pointer. A selection unit selects consecutive first hash values and pieces of first complementary data from the buffer. A second conversion unit converts the consecutive first hash values into a third character string using the pieces of first complementary data. A comparison unit compares the second character string with the third character string to acquire a matching length. An output unit output the matching length with the pointer.

    COMPRESSION CIRCUIT, STORAGE SYSTEM, AND COMPRESSION METHOD

    公开(公告)号:US20230081961A1

    公开(公告)日:2023-03-16

    申请号:US17693606

    申请日:2022-03-14

    Abstract: According to one embodiment, a compression circuit generates substrings from input data for (3+M) cycles, the input data being N bytes per cycle, a byte length of each substring being greater than or equal to (N×(1+M)+1); obtains a set of matches, each of the matches including at least one past input data which input past and corresponds to at least a part of each of the substrings; selects a subset of matches from the set of matches including the input data of one cycle; and outputs the subset of matches. M is zero or a natural number. N is a positive integer which is two or more.

    DATA COMPRESSION DEVICE, MEMORY SYSTEM AND METHOD

    公开(公告)号:US20230070623A1

    公开(公告)日:2023-03-09

    申请号:US17653513

    申请日:2022-03-04

    Abstract: According to one embodiment, a data compression device includes a dictionary match determination unit, an extended matching generator, a match selector and a match connector. The dictionary match determination unit searches for first past input data matching first new input data. The extended matching generator compares second past input data subsequent to the first past input data with second new input data subsequent to the first new input data. The match selector generates compressed data by replacing a part of the input data with match information output from the dictionary match determination unit or the extended matching generator. The match connector replaces a plurality of match information in the compressed data with single match information.

    COMPRESSION DEVICE, COMPRESSION AND DECOMPRESSION DEVICE, AND MEMORY SYSTEM

    公开(公告)号:US20220398019A1

    公开(公告)日:2022-12-15

    申请号:US17686246

    申请日:2022-03-03

    Abstract: A compression device includes an analyzer circuit, a control circuit, a compressor circuit, and a selector circuit. The analyzer circuit is configured to analyze first data that is input thereto and generate one or more parameter values regarding data compression and/or decompression. The control circuit is configured to generate at least one compression mode information indicating whether or not compression is to be performed, based on the one or more parameter values. The compressor circuit is configured to compress the first data into second data according to the compression mode information. The selector circuit is configured to output the first data if not compressed or the second data if the first data is compressed, together with the compression mode information.

    MEMORY SYSTEM
    10.
    发明申请

    公开(公告)号:US20220353519A1

    公开(公告)日:2022-11-03

    申请号:US17868597

    申请日:2022-07-19

    Abstract: According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.

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