公开(公告)号：US20210289217A1

公开(公告)日：2021-09-16

申请号：US17019941

申请日：2020-09-14

Applicant: Kioxia Corporation

Inventor： Daisuke YASHIMA ,  Masato SUMIYOSHI ,  Keiri NAKANISHI ,  Takashi MIURA ,  Kohei OIKAWA ,  Sho KODAMA ,  Youhei FUKAZAWA ,  Zheye WANG

IPC: H04N19/423 ,  H04N19/13 ,  H04N19/146

Abstract: According to one embodiment, a memory system includes a frequency value update unit, a first intra-group rearranging unit, a second intra-group rearranging unit, and a routing unit. The frequency value update unit adds a first value to each of one or more first frequency values that are associated with one or more first symbols, respectively, in one or more entries in a table. The first intra-group rearranging unit rearranges first entries, which belong to a first group, using frequency values in the first entries. The second intra-group rearranging unit rearranges second entries, which belong to a second group lower than the first group, using frequency values. The routing unit rearranges at least one of the first entries and at least one of the second entries.

公开(公告)号：US20210288662A1

公开(公告)日：2021-09-16

申请号：US17010013

申请日：2020-09-02

Applicant: Kioxia Corporation

Inventor： Youhei FUKAZAWA ,  Keiri NAKANISHI ,  Sho KODAMA ,  Masato SUMIYOSHI ,  Kohei OIKAWA ,  Daisuke YASHIMA ,  Takashi MIURA ,  Zheye WANG

IPC: H03M7/40 ,  H03M7/30 ,  G06F40/126

Abstract: According to one embodiment, a compression device includes a dictionary based encoder, a second buffer, a comparator, and a compression data generator. The dictionary based encoder searches for second data at least partially matching first data from a first buffer, and acquires a first match position indicating a position of the second data in the first buffer and a match length indicating a matched length of the first and second data. The second buffer stores the previously acquired second match position with an index. The compression data generator generates first compressed data that includes the index assigned to the second match position in the second buffer and the match length when the first match position matches the second match position in the second buffer.

公开(公告)号：US20250013759A1

公开(公告)日：2025-01-09

申请号：US18743458

申请日：2024-06-14

Applicant: Kioxia Corporation

Inventor： Keiri NAKANISHI ,  Takaya OGAWA ,  Takashi TAKEMOTO ,  Kohei OIKAWA

IPC: G06F21/60

Abstract: A controller of a memory system includes circuitry that generates a first compression unit that is calculated based on first namespace setting information indicating setting of a write-destination namespace, and corresponds to the write-destination namespace. The first compression unit has a size satisfying a constraint that an encryption key for encrypting data to be written into the write-destination namespace is not switched in the first compression unit.

公开(公告)号：US20240281370A1

公开(公告)日：2024-08-22

申请号：US18581505

申请日：2024-02-20

Applicant: Kioxia Corporation

Inventor： Hirotsugu KAJIHARA ,  Yu NAKANISHI ,  Kohei OIKAWA ,  Kazuhiro HIWADA

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: According to one embodiment, a memory system includes: a nonvolatile memory including blocks each of which includes physical memory areas; and a memory controller dividing a logical address space into a plurality of banks and associating a block with each of the plurality of banks. The memory controller is configured to: selectively scan a portion related to a first bank among the plurality of banks in a table in which a physical address corresponding to a physical memory area in which valid data is stored is mapped on the logical address space; detect a first physical address corresponding to a first physical memory area in a first block associated with the first bank as a result of the scan; read first valid data stored in the first block based on the first physical address; and write the first valid data in a second block associated with the first bank.

公开(公告)号：US20230087517A1

公开(公告)日：2023-03-23

申请号：US17680128

申请日：2022-02-24

Applicant: KIOXIA CORPORATION

Inventor： Kohei OIKAWA ,  Keiri NAKANISHI ,  Sho KODAMA ,  Masato SUMIYOSHI ,  Daisuke YASHIMA ,  Youhei FUKAZAWA ,  Zheye WANG ,  Takashi MIURA

IPC: H03M13/09 ,  H03M13/00

Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to, during a writing operation, generate a first error-detecting code from data that is input, perform a predetermined conversion on the data into first conversion data, generate a second error-detecting code from the first conversion data, and store the data, the first error-detecting code, and the second-error detecting code in the non-volatile memory. The controller is configured to during a read operation, read the data, the first error-detecting code, and the second error-detecting code from the non-volatile memory, perform a first error detection on the data using the first error-detecting code, perform the predetermined conversion on the data into second conversion data, perform a second error detection on the second conversion data using the second error-detecting code, and output the second conversion data based on results of the first and second error detections.

公开(公告)号：US20220255556A1

公开(公告)日：2022-08-11

申请号：US17472431

申请日：2021-09-10

Applicant: Kioxia Corporation

Inventor： Daisuke YASHIMA ,  Kohei OIKAWA ,  Sho KODAMA ,  Keiri NAKANISHI ,  Masato SUMIYOSHI ,  Youhei FUKAZAWA ,  Zheye WANG ,  Takashi MIURA

IPC: H03M7/30 ,  G06F3/06

Abstract: According to one embodiment, a buffer stores first hash values and first complementary data. A first conversion unit converts consecutive characters in a second character string into second hash values and second complementary data. A search unit searches for consecutive first hash values from the buffer, and output a pointer. A selection unit selects consecutive first hash values and pieces of first complementary data from the buffer. A second conversion unit converts the consecutive first hash values into a third character string using the pieces of first complementary data. A comparison unit compares the second character string with the third character string to acquire a matching length. An output unit output the matching length with the pointer.

公开(公告)号：US20220083282A1

公开(公告)日：2022-03-17

申请号：US17191845

申请日：2021-03-04

Applicant: Kioxia Corporation

Inventor： Masato SUMIYOSHI ,  Keiri NAKANISHI ,  Sho KODAMA ,  Kohei OIKAWA

IPC: G06F3/06 ,  H03M7/30

Abstract: A memory system includes a storage device and a memory controller. The memory controller includes an encoder and a decoder. The encoder includes a first code table updating section configured to update the encoding code table and an encoding flow controlling section configured to control input to the first code table updating section by using a first data amount indicating a data amount of the input symbol. The first data amount is calculated based on the input symbol. The decoder includes a second code table updating section configured to update the decoding code table and a decoding flow controlling section configured to control input to the second code table updating section by using a second data amount indicating a data amount of the output symbol. The second data amount is calculated based on the output symbol in the same way as the calculation of the first data amount.

公开(公告)号：US20250013533A1

公开(公告)日：2025-01-09

申请号：US18761725

申请日：2024-07-02

Applicant: Kioxia Corporation

Inventor： Kohei OIKAWA

IPC: G06F11/10

Abstract: A memory system includes a nonvolatile memory device and a controller configured to generate page data of a first predetermined size, which includes a plurality of error correction frames, each of which has a second predetermined size, and write the generated page data into the nonvolatile memory device. The plurality of error correction frames includes a first error correction frame and a second error correction frame. The first error correction frame includes first data and a first error correction data for correcting the first data. The second error correction frame includes second data and a second error correction data for correcting the second data. The first error correction frame and the second error correction frame partially overlap with each other. An overlapping area of the first and second error correction frames includes a part of the first data and a part of the second data.

公开(公告)号：US20240311003A1

公开(公告)日：2024-09-19

申请号：US18599914

申请日：2024-03-08

Applicant: Kioxia Corporation

Inventor： Kohei OIKAWA ,  Youhei FUKAZAWA ,  Keiri NAKANISHI ,  Sho Kodama ,  Takashi TAKEMOTO

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0673

Abstract: According to one embodiment, a memory controller includes a parameter table having entries which respectively correspond to superblock address ranges. The memory controller translates a logical address of data to be written to the memory into a superblock address, calculates compression parameters which correspond to items of data to be written to superblock addresses, writes the compression parameters to the parameter table, and compress data using the parameter table.

公开(公告)号：US20240094940A1

公开(公告)日：2024-03-21

申请号：US18460284

申请日：2023-09-01

Applicant: Kioxia Corporation

Inventor： Kensaku YAMAGUCHI ,  Kiyotaka IWASAKI ,  Takashi TAKEMOTO ,  Kohei OIKAWA

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0608 ,  G06F3/0679

Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to perform a write operation of a first data cluster and a first partial overwrite operation of the first data cluster with first overwrite data. The write operation includes compressing and then encrypting the first data cluster, and writing the compressed and encrypted first data cluster into a first physical location of the non-volatile memory. The first partial overwrite operation includes encrypting the first overwrite data without performing compression, reading the compressed and encrypted first data cluster from the first physical location of the non-volatile memory, generating a first composite data cluster with the compressed and encrypted first data cluster read from the first physical location and the encrypted first overwrite data that is not compressed, and writing the first composite data cluster into a second physical location of the non-volatile memory.