公开(公告)号：US20230276627A1

公开(公告)日：2023-08-31

申请号：US17901606

申请日：2022-09-01

Applicant: Kioxia Corporation

Inventor： Takashi FUKUSHIMA ,  Kaihei KATOU ,  Kenichiro TORATANI ,  Ryota FUJITSUKA ,  Junya FUJITA ,  Atsushi FUKUMOTO ,  Motoki FUJII ,  Yuki WAKISAKA ,  Kazuya HATANO

IPC: H01L27/11582

CPC classification number: H01L27/11582

Abstract: A semiconductor device according to the present embodiment comprises a stack including a plurality of electrode films stacked in a first direction to be separated from each other. A column portion extends in the stack in the first direction and includes a semiconductor layer, and has memory cells at respective intersections of the semiconductor layer and the electrode films. A dividing portion extends in the stack in the first direction and a second direction crossing the first direction, divides the electrode films in a third direction crossing the first direction and the second direction, and includes an insulator. A first film is provided between the insulator and an end surface in the third direction of each of the electrode films and contains a first metal and silicon.

公开(公告)号：US20230301088A1

公开(公告)日：2023-09-21

申请号：US17806111

申请日：2022-06-09

Applicant: Kioxia Corporation

Inventor： Saho OHSAWA ,  Kenichi FUJII ,  Takashi FUKUSHIMA ,  Hiroyuki OHTORI ,  Kaihei KATOU ,  Masaki KATO ,  Ryosuke SAWABE ,  Yuji SAKAI

IPC: H01L27/11582 ,  H01L29/423 ,  H01L29/51

CPC classification number: H01L27/11582 ,  H01L29/4234 ,  H01L29/513

Abstract: A semiconductor memory device of an embodiment includes: a semiconductor layer extending in a first direction; a gate electrode layer containing at least one element selected from a group consisting of molybdenum (Mo), tungsten (W), ruthenium (Ru), and cobalt (Co); a first insulating layer provided between the semiconductor layer and the gate electrode layer; a charge storage layer provided between the first insulating layer and the gate electrode layer; a second insulating layer provided between the charge storage layer and the gate electrode layer; a third insulating layer provided between the second insulating layer and the gate electrode layer; and a metal oxide layer provided between the third insulating layer and the gate electrode layer and containing at least one first metal element selected from a group consisting of titanium (Ti), molybdenum (Mo), tungsten (W), and tantalum (Ta).