Abstract:
A thin film transistor array substrate includes a gate line formed on a substrate, a data line formed on the substrate intersecting with the gate line to define a pixel region, a thin film transistor formed at the intersection of the gate line and the data line, the thin film transistor including gate electrode formed on the substrate, a gate insulating layer formed on the gate electrode and the substrate, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer on the semiconductor layer, and a source electrode and a drain electrode on the ohmic contact layer, and a transparent electrode material within the pixel region and connected to the drain electrode of the thin film transistor, wherein the gate insulating layer includes a gate insulating pattern underlying the data line and the transparent electrode material, and covering the gate line.
Abstract:
A liquid crystal display device includes a plurality of signal lines on a substrate, a plurality of pad electrodes on the substrate, each one of the plurality of pad electrodes connected to one of the plurality of signal lines, at least one insulating film on the plurality of pad electrodes, the at least one insulating film having a plurality of contact holes to expose portions of the pad electrodes, and a conductive film electrically connected to each of the plurality of pad electrodes through the contact holes.