Abstract:
The disclosure is directed to a system and method of cache management for a data storage system. According to various embodiments, the cache management system includes a hinting driver and a priority controller. The hinting driver generates pointers based upon data packets intercepted from data transfer requests being processed by a host controller of the data storage system. The priority controller determines whether the data packets are associated with at least a first (high) priority level or a second (normal or low) priority level based upon the pointers generated by the hinting driver. High priority data packets are stored in cache memory regardless of whether they satisfy a threshold heat quotient (i.e. a selected level of data transfer activity).
Abstract:
Aspects of the disclosure pertain to a system and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life. The mechanism restricts flash memory cache caching of inputs/outputs associated with Least Recently Used data and Most Recently Used data when a temperature of the flash memory is at or above a threshold temperature.
Abstract:
The disclosure is directed to a system and method of cache management for a data storage system. According to various embodiments, the cache management system includes a hinting driver and a priority controller. The hinting driver generates pointers based upon data packets intercepted from data transfer requests being processed by a host controller of the data storage system. The priority controller determines whether the data packets are associated with at least a first (high) priority level or a second (normal or low) priority level based upon the pointers generated by the hinting driver. High priority data packets are stored in cache memory regardless of whether they satisfy a threshold heat quotient (i.e. a selected level of data transfer activity).
Abstract:
Aspects of the disclosure pertain to a system and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life. The mechanism restricts flash memory cache caching of inputs/outputs associated with Least Recently Used data and Most Recently Used data when a temperature of the flash memory is at or above a threshold temperature.