公开(公告)号：US20250104778A1

公开(公告)日：2025-03-27

申请号：US18475247

申请日：2023-09-27

Applicant: MACRONIX International Co., Ltd.

Inventor： Che-Ping Chen ,  Ya-Jui Lee

IPC: G11C16/26 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10

Abstract: An operation method of a memory device including the following operations is provided. Applying a read voltage to a selected page of a plurality of programmed memory pages. Applying a first pass voltage to unselected pages of the plurality of programmed memory pages. Applying a second pass voltage to at least one unprogrammed memory page, wherein the first pass voltage is larger than the second pass voltage. A memory system including a 3D NAND flash memory with high capacity and high performance is also provided.

公开(公告)号：US12136461B2

公开(公告)日：2024-11-05

申请号：US17394850

申请日：2021-08-05

Applicant: Macronix International Co., Ltd.

Inventor： Che-Ping Chen ,  Ya-Jui Lee

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26

Abstract: A memory controller receives a command to program information to a memory storage array controlled by the memory controller. The memory controller determines a target memory state to store the information, and a target threshold voltage level corresponding to the target memory state. Based at least on the target memory state, the memory controller determines one or more program pulses for a pre-program cycle, including voltage levels for the one or more program pulses based at least on the target threshold voltage level. The memory controller selects a memory location in the memory storage array to program the information, and pre-programs the selected memory location by applying the one or more program pulses at respective voltage levels, the one or more program pulses applied without program verify operations. Following the pre-programming, the memory controller programs the information to the selected memory location.

公开(公告)号：US11056172B1

公开(公告)日：2021-07-06

申请号：US16860349

申请日：2020-04-28

Applicant: MACRONIX International Co., Ltd.

Inventor： Che-Ping Chen ,  Ya-Jui Lee ,  Shin-Jang Shen ,  Yih-Shan Yang

IPC: G11C7/22 ,  G11C11/4076 ,  G11C11/4074 ,  G11C11/4099 ,  G11C11/4094 ,  G11C11/408 ,  G11C16/04 ,  G11C16/32 ,  G11C16/34 ,  G11C16/26 ,  G11C16/06

Abstract: A flash memory and an operation method thereof are provided. The flash memory includes a plurality of memory cell strings and a pass voltage generator. Each of the memory cell strings includes a plurality of memory cells. The pass voltage generator is configured to provide a pass voltage to a plurality of word lines of a plurality of unselected memory cells of a selected memory string. During a reading operation, the pass voltage generator raises the pass voltage from a first voltage at a first time point, and raises the pass voltage to a second voltage at a second time point. The second voltage is lower than a target voltage times a preset ratio The first time point is earlier than a start time point of a bit line voltage received by the selected memory cell, and the second time point occurs at the start time point of the bit line voltage.