公开(公告)号：US20150033062A1

公开(公告)日：2015-01-29

申请号：US14325368

申请日：2014-07-08

Applicant: MEDIATEK INC.

Inventor： You-Ming Tsao ,  Chun-Liang Chen ,  Chen-Chia Lee

IPC: G06F1/08 ,  G06F12/14 ,  H03K5/00

CPC classification number: G06F1/08 ,  G06F1/324 ,  G06F1/3296 ,  G06F13/1689 ,  Y02D10/126

Abstract: A clock generator includes a controllable clock source and a frequency hopping controller. The controllable clock source generates a clock signal to a clock-driven device. The frequency hopping controller controls the controllable clock source to make the clock signal have at least one frequency transition from one clock frequency to another clock frequency, wherein the controllable clock source stays in a frequency-locked state during a time period of the at least one frequency transition.

Abstract translation: 时钟发生器包括可控时钟源和跳频控制器。 可控时钟源产生时钟驱动器件的时钟信号。 跳频控制器控制可控时钟源，使得时钟信号具有从一个时钟频率到另一个时钟频率的至少一个频率转换，其中可控时钟源在至少一个时钟频率的时间段期间保持在频率锁定状态 频率转换。

公开(公告)号：US10545530B2

公开(公告)日：2020-01-28

申请号：US15593314

申请日：2017-05-11

Applicant: MEDIATEK INC.

Inventor： You-Ming Tsao ,  Chun-Liang Chen ,  Chen-Chia Lee

IPC: G06F13/16 ,  G06F1/08 ,  G06F1/324 ,  G06F1/3296

Abstract: An electronic device includes a memory controller and a processor. The memory controller controls access of a memory device. The processor performs a calibration operation to find a first setting range of a memory controller parameter under a first clock frequency of the memory device, to find a second setting range of the memory controller parameter under a second clock frequency of the memory device, and to determine a calibrated setting of the memory controller parameter according to an overlapped range of the first setting range and the second setting range.

公开(公告)号：US20170248987A1

公开(公告)日：2017-08-31

申请号：US15593314

申请日：2017-05-11

Applicant: MEDIATEK INC.

Inventor： You-Ming Tsao ,  Chun-Liang Chen ,  Chen-Chia Lee

IPC: G06F1/08 ,  G06F1/32 ,  G06F13/16

CPC classification number: G06F1/08 ,  G06F1/324 ,  G06F1/3296 ,  G06F13/1689 ,  Y02D10/126

Abstract: An electronic device includes a memory controller and a processor. The memory controller controls access of a memory device. The processor performs a calibration operation to find a first setting range of a memory controller parameter under a first clock frequency of the memory device, to find a second setting range of the memory controller parameter under a second clock frequency of the memory device, and to determine a calibrated setting of the memory controller parameter according to an overlapped range of the first setting range and the second setting range.