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1.发明授权Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator 有权分频器，时钟发生装置和能够校准振荡器频率漂移的方法公开(公告)号：US09344065B2
公开(公告)日：2016-05-17
申请号：US14048035
申请日：2013-10-07
Applicant: MEDIATEK INC.
Inventor： Yu-Ming Ying , Shiue-Shin Liu
CPC classification number: H03K3/013 , H03K7/06 , H03L1/022 , H03L7/1974 , H03L7/1976
Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.
Abstract translation: 时钟发生装置包括振荡器和频率合成器。 振荡器用于产生参考时钟信号。 频率合成器耦合到振荡器，用于根据参考时钟信号和调整或补偿的分频因子来合成目标时钟信号，并输出目标时钟信号作为时钟发生装置的输出。
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Patent Agency Ranking
2.发明申请FREQUENCY DIVIDER, CLOCK GENERATING APPARATUS, AND METHOD CAPABLE OF CALIBRATING FREQUENCY DRIFT OF OSCILLATOR 有权频率分频器，时钟发生装置和可校准振荡器频率干扰的方法公开(公告)号：US20140111257A1
公开(公告)日：2014-04-24
申请号：US14048035
申请日：2013-10-07
Applicant: MEDIATEK INC.
Inventor： Yu-Ming Ying , Shiue-Shin Liu
IPC: H03K3/013
CPC classification number: H03K3/013 , H03K7/06 , H03L1/022 , H03L7/1974 , H03L7/1976
Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.
Abstract translation: 时钟发生装置包括振荡器和频率合成器。 振荡器用于产生参考时钟信号。 频率合成器耦合到振荡器，用于根据参考时钟信号和调整或补偿的分频因子来合成目标时钟信号，并输出目标时钟信号作为时钟发生装置的输出。
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公开(公告)号：US20190245486A1
公开(公告)日：2019-08-08
申请号：US16149147
申请日：2018-10-02
Applicant: MEDIATEK INC.
Inventor： Yu-Ming Ying
IPC: H03B5/12
CPC classification number: H03B5/1228 , H03B2200/0082 , H03B2200/009 , H03B2201/0266
Abstract: A switching inductor device having a first port and a second port includes a first inductor and a second inductor with a switch circuit. The first inductor is coupled between the first port and the second port. The second inductor and the switch circuit are connected in series, and are coupled between the first port and the second port; the first inductor and the second inductor are connected in parallel when the switch circuit is turned on.
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公开(公告)号：US10862424B2
公开(公告)日：2020-12-08
申请号：US16149147
申请日：2018-10-02
Applicant: MEDIATEK INC.
Inventor： Yu-Ming Ying
Abstract: A switching inductor device having a first port and a second port includes a first inductor and a second inductor with a switch circuit. The first inductor is coupled between the first port and the second port. The second inductor and the switch circuit are connected in series, and are coupled between the first port and the second port; the first inductor and the second inductor are connected in parallel when the switch circuit is turned on.
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公开(公告)号：US09692395B2
公开(公告)日：2017-06-27
申请号：US15067141
申请日：2016-03-10
Applicant: MEDIATEK INC.
Inventor： Yu-Ming Ying , Shiue-Shin Liu
CPC classification number: H03K3/013 , H03K7/06 , H03L1/022 , H03L7/1974 , H03L7/1976
Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.
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6.发明申请FREQUENCY DIVIDER, CLOCK GENERATING APPARATUS, AND METHOD CAPABLE OF CALIBRATING FREQUENCY DRIFT OF OSCILLATOR 有权频率分频器，时钟发生装置和可校准振荡器频率干扰的方法公开(公告)号：US20160197599A1
公开(公告)日：2016-07-07
申请号：US15067141
申请日：2016-03-10
Applicant: MEDIATEK INC.
Inventor： Yu-Ming Ying , Shiue-Shin Liu
CPC classification number: H03K3/013 , H03K7/06 , H03L1/022 , H03L7/1974 , H03L7/1976
Abstract: A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.
Abstract translation: 时钟发生装置包括振荡器和频率合成器。 振荡器用于产生参考时钟信号。 频率合成器耦合到振荡器，用于根据参考时钟信号和调整或补偿的分频因子来合成目标时钟信号，并输出目标时钟信号作为时钟发生装置的输出。
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