公开(公告)号：US20250087283A1

公开(公告)日：2025-03-13

申请号：US18771479

申请日：2024-07-12

Applicant: Micron Technology, Inc.

Inventor： Yu-Chung Lien ,  John Paul Aglubat ,  Zhenming Zhou

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/12

Abstract: Access line voltage ramp rate adjustment is described herein. An apparatus may include a memory device including a plurality of groups of memory cells and a processing device coupled to the memory device which may receive a program command to be executed on one of the plurality of groups of memory cells and determine if a program verify (PVFY) loop associated with the program command is below a threshold for a subblock of the memory device that includes the one of the plurality of groups. Responsive to a determination that the PVFY loop is not below the threshold, the program command can be executed. Responsive to a determination that the PVFY loop is below the threshold, an unselected access line voltage ramp rate for the subblock can be adjusted to a slower rate, and the program command can be executed using the adjusted unselected access line voltage ramp rate.

公开(公告)号：US11216219B2

公开(公告)日：2022-01-04

申请号：US16871366

申请日：2020-05-11

Applicant: Micron Technology, Inc.

Inventor： Liang Yu ,  John Paul Aglubat ,  Fulvio Rori

IPC: G06F3/00 ,  G06F3/06 ,  G11C7/10 ,  G06F1/14

Abstract: A memory management operation is executed on a plurality of memory dies of a memory sub-system. The memory sub-system determines whether a first measured current level corresponding to execution of the memory management operation satisfies a condition pertaining to a threshold peak current level. The memory sub-system determines whether a second measured current level corresponding to execution of the memory management operation satisfies the condition pertaining to the threshold peak current level. Mask data is generated identifying the first measured current level and the second measured current level. A request is received from a host system to execute the memory management operation. The memory sub-system performs, based on the mask data, a peak current management action during execution of the memory management operation.

公开(公告)号：US11681474B2

公开(公告)日：2023-06-20

申请号：US17562590

申请日：2021-12-27

Applicant: Micron Technology, Inc.

Inventor： Liang Yu ,  John Paul Aglubat ,  Fulvio Rori

IPC: G06F3/00 ,  G06F3/06 ,  G11C7/10 ,  G06F1/14

CPC classification number: G06F3/0659 ,  G06F1/14 ,  G06F3/0604 ,  G06F3/0673 ,  G11C7/1009

Abstract: A portion of a memory management operation associated with a first current level that satisfies a condition pertaining to a threshold current level and a second current level that satisfies the condition pertaining to the threshold current level is identified. Mask data associated with the portion of the memory management operation is identified. Based on the mask data, a current management action is performed during execution of a requested memory management operation received from a host system.

公开(公告)号：US20220121399A1

公开(公告)日：2022-04-21

申请号：US17562590

申请日：2021-12-27

Applicant: Micron Technology, Inc.

Inventor： Liang Yu ,  John Paul Aglubat ,  Fulvio Rori

IPC: G06F3/06 ,  G06F1/14 ,  G11C7/10

Abstract: A portion of a memory management operation associated with a first current level that satisfies a condition pertaining to a threshold current level and a second current level that satisfies the condition pertaining to the threshold current level is identified. Mask data associated with the portion of the memory management operation is identified. Based on the mask data, a current management action is performed during execution of a requested memory management operation received from a host system.

公开(公告)号：US20230195312A1

公开(公告)日：2023-06-22

申请号：US17990126

申请日：2022-11-18

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Liang Yu ,  Jonathan S. Parry ,  Fumin Gu ,  John Paul Aglubat

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0634 ,  G06F3/0679

Abstract: A memory device includes memory dies, each memory die including a memory array and control logic, operatively coupled with the memory array, to perform peak power management (PPM) operations. The PPM operations include causing a memory die to be placed in a suspended state to suspend execution of a first media access operation with a reserved current budget, receiving a set of requests to execute at least a second media access operation during the suspended state, and in response receiving the set of requests, handling the set of requests by implementing current budget arbitration logic with respect to the reserved current budget.

公开(公告)号：US20210349663A1

公开(公告)日：2021-11-11

申请号：US16871366

申请日：2020-05-11

Applicant: Micron Technology, Inc.

Inventor： Liang Yu ,  John Paul Aglubat ,  Fulvio Rori

IPC: G06F3/06 ,  G06F1/14 ,  G11C7/10

Abstract: A memory management operation is executed on a plurality of memory dies of a memory sub-system. The memory sub-system determines whether a first measured current level corresponding to execution of the memory management operation satisfies a condition pertaining to a threshold peak current level. The memory sub-system determines whether a second measured current level corresponding to execution of the memory management operation satisfies the condition pertaining to the threshold peak current level. Mask data is generated identifying the first measured current level and the second measured current level. A request is received from a host system to execute the memory management operation. The memory sub-system performs, based on the mask data, a peak current management action during execution of the memory management operation.