公开(公告)号：US07033268B2

公开(公告)日：2006-04-25

申请号：US10418186

申请日：2003-04-17

申请人： Guy Caliendo ,  Martin Buck

发明人： Guy Caliendo ,  Martin Buck

IPC分类号： A62C2/12

CPC分类号： F24F13/1426 ,  A62C2/14 ,  A62C2/247 ,  F24F11/33 ,  F24F2013/144

摘要： A damper actuator for a ventilation damper serves as both a control device for the ventilation damper and a fire and smoke rated device for the ventilation damper. The damper actuator includes a modulating motor controller, a two-point motor controller, and a thermal switch or switch like device that is operative to switch control of the motor from the modulating motor controller used during normal operation, to the two-point motor controller during a fire and smoke condition. The damper actuator provides an automatic and permanent disabling (by-passing) of the modulating motor controller functions the first time a pre-determined temperature level (switch point) is reached via the thermal switch or switch like device. Once the modulating motor controller is disabled, the actuator no longer supports the advanced motor control functions (i.e. the modulating control). Thereafter, the thermal switch or switch like device enables a two-point motor controller that is operative to put the damper into either a fully open or a fully closed position.

摘要翻译： 用于通风阻尼器的阻尼器致动器用作通风阻尼器的控制装置和用于通风阻尼器的防火和烟雾评估装置。 阻尼器致动器包括调节电动机控制器，两点电动机控制器，以及用于将正常操作期间使用的调节电动机控制器的电动机的控制切换到两点电动机控制器的热开关或开关装置 在火灾和烟雾状况。 第一次通过热开关或类似设备的开关达到预定的温度水平（切换点）时，阻尼器致动器提供调节电机控制器的自动和永久的禁用（旁路）功能。 一旦调节电机控制器被禁用，执行器就不再支持先进的电机控制功能（即调制控制）。 此后，热开关或类似开关的装置使得两点电动机控制器可操作地将阻尼器置于完全打开或完全关闭的位置。

公开(公告)号：US6137314A

公开(公告)日：2000-10-24

申请号：US450403

申请日：1999-11-29

申请人： Martin Buck

发明人： Martin Buck

IPC分类号： H03K19/0185 ,  H03K19/0175

CPC分类号： H03K19/018585

摘要： An input circuit has an inverter and a differential amplifier, which are respectively connected on an input side to an input and on an output side to an output of the input circuit. The input circuit has two operating modes defined by an activation signal, the differential amplifier being activated and the inverter being deactivated in a first operating mode, and the differential amplifier being deactivated and the inverter being activated in a second operating mode. In this manner, the input circuit has the advantage of selective operation with LVTTL or SSTL levels.

摘要翻译： 输入电路具有反相器和差分放大器，它们分别在输入侧连接到输入侧和输出侧到输入电路的输出端。 输入电路具有由激活信号定义的两种操作模式，差分放大器被激活，并且在第一操作模式中反相器被去激活，并且差分放大器被停用，并且逆变器在第二操作模式下被激活。 以这种方式，输入电路具有LVTTL或SSTL电平的选择性操作的优点。

公开(公告)号：US06445753B1

公开(公告)日：2002-09-03

申请号：US09128807

申请日：1998-08-04

申请人： Martin Buck

发明人： Martin Buck

IPC分类号： H04L2706

CPC分类号： H03K5/1252

摘要： A method and a circuit configuration deactivate an input of a receiving circuit when a first edge occurs, during processing of a digital input signal. When a falling edge occurs, the input is only reactivated after a delay. An influence of signal interference and incorrect interpretations of the signal can thereby be reduced. The method and circuit configuration are employed in particular with clock signals in which only one edge is used for signal evaluation.

摘要翻译： 一种方法和电路配置在数字输入信号的处理期间，当第一边缘发生时，停用接收电路的输入。 当发生下降沿时，仅在延迟后重新激活输入。 因此可以降低信号干扰的影响和信号的不正确解释。 该方法和电路配置特别地用于其中仅一个边缘用于信号评估的时钟信号。

公开(公告)号：US07039143B2

公开(公告)日：2006-05-02

申请号：US09756084

申请日：2001-01-08

申请人： Martin Buck

发明人： Martin Buck

IPC分类号： H04L7/00

CPC分类号： H03K5/135 ,  H03K5/131

摘要： The circuit has a first input for supplying a first signal (S1) to a series circuit made from a plurality of basic elements. Each basic element has a memory (M) for storing the signal level which is applied to the input of the basic element, and the output of a storage element (M) is connected to the input of a next basic element. Furthermore, the circuit has a second input for supplying a second signal (S2) which is connected to a control input of each basic element. Given a first level of the second signal, the storage elements (M) take up the signal level stored in the preceding storage element, and given a second level of the second signal, the storage elements (M) retain the signal level respectively stored in them. Furthermore, the circuit has comparator units (XOR) to which, in each case, the signal levels stored by the storage units (M) of two adjacent basic elements are supplied.

摘要翻译： 电路具有用于向由多个基本元件制成的串联电路提供第一信号（S1）的第一输入端。 每个基本元件具有用于存储施加到基本元素的输入的信号电平的存储器（M），并且存储元件（M）的输出连接到下一个基本元件的输入。 此外，电路具有用于提供连接到每个基本元件的控制输入的第二信号（S 2）的第二输入。 给定第二信号的第一电平，存储元件（M）占据存储在先前存储元件中的信号电平，并且给定第二信号的第二电平，存储元件（M）保持分别存储在 他们。 此外，电路具有比较器单元（XOR），在每种情况下，提供由两个相邻基本单元的存储单元（M）存储的信号电平。

公开(公告)号：US06380782B2

公开(公告)日：2002-04-30

申请号：US09756525

申请日：2001-01-08

申请人： Martin Buck

发明人： Martin Buck

IPC分类号： H03H1116

CPC分类号： G01R31/3016 ,  G06F1/10

摘要： The integrated circuit has a clock input for an external clock signal and an output unit controlled by an internal clock signal in a normal mode of operation to output data to a data output. In addition, the integrated circuit has a control unit generating the internal clock signal from the external clock signal. The control unit has a phase shift unit that, in the normal mode of operation, effects a phase shift of the internal clock signal generated by the control unit with respect to the external clock signal. In addition, the integrated circuit has a detector unit determining the capacitive load on the data output. The detector unit supplying the phase shift unit with a corresponding detector signal on the basis of which the phase shift is set.

摘要翻译： 集成电路具有用于外部时钟信号的时钟输入和在正常工作模式下由内部时钟信号控制的输出单元，以将数据输出到数据输出。 此外，集成电路具有从外部时钟信号产生内部时钟信号的控制单元。 控制单元具有相移单元，其在正常操作模式下，相对于外部时钟信号实现由控制单元产生的内部时钟信号的相移。 此外，集成电路具有确定数据输出上的容性负载的检测器单元。 检测器单元向相移单元提供相应的检测器信号，基于该检测器信号设置相移。

公开(公告)号：US06366110B1

公开(公告)日：2002-04-02

申请号：US09353612

申请日：1999-07-14

申请人： Martin Buck

发明人： Martin Buck

IPC分类号： G01R3126

CPC分类号： H01L22/32

摘要： A configuration is provided for testing chips produced from a wafer. The chips are supplied with test signals through the use of a test head. The test signals can be applied in a serial or parallel manner to the chips which are actually in the wafer, through the use of test lines provided in a sawing edge of the chips.

摘要翻译： 提供了用于测试从晶片制造的芯片的配置。 芯片通过使用测试头提供测试信号。 测试信号可以通过使用设置在芯片的锯切边缘中的测试线以串联或并行方式应用于实际在晶片中的芯片。

公开(公告)号：US07176443B2

公开(公告)日：2007-02-13

申请号：US10958189

申请日：2004-10-05

申请人： Holger Lautenschlāger ,  Jaromir Palata ,  Martin Buck ,  Hartmut Bielefeldt ,  Rolf Fensterle

发明人： Holger Lautenschlāger ,  Jaromir Palata ,  Martin Buck ,  Hartmut Bielefeldt ,  Rolf Fensterle

IPC分类号： G08B13/18 ,  G01C3/00 ,  G01C3/08

CPC分类号： G01V8/14

摘要： An optoelectronic sensor, especially a reflection photoelectric barrier and a reflection light sensing device, for detection of an object (2) in a monitored area, with a housing (3) with transmitting and receiving optics (6) and with an evaluation circuit (10). The optoelectronic sensor has an especially simple structure in that there is only one single optoelectronic transmitting and receiving component (14) which sequentially acts as both the opto-transmitter and the opto-receiver in succession in time.

摘要翻译： 一种光电传感器，特别是反射光电屏障和反射光感测装置，用于检测被监视区域中的物体（2），具有带有发射和接收光学器件（6）的外壳（3）和评估电路（10） ）。 光电传感器具有特别简单的结构，其中只有一个单独的光电发射和接收部件（14）在时间上连续地依次作为光发射器和光接收器。

公开(公告)号：US20050116149A1

公开(公告)日：2005-06-02

申请号：US10958189

申请日：2004-10-05

申请人： Holger Lautenschlager ,  Jaromir Palata ,  Martin Buck ,  Hartmut Bielefeldt ,  Rolf Fensterle

发明人： Holger Lautenschlager ,  Jaromir Palata ,  Martin Buck ,  Hartmut Bielefeldt ,  Rolf Fensterle

IPC分类号： G01V8/14 ,  G02B6/12 ,  G06M7/00 ,  H01J40/14

CPC分类号： G01V8/14

摘要： An optoelectronic sensor, especially a reflection photoelectric barrier and a reflection light sensing device, for detection of an object (2) in a monitored area, with a housing (3) with transmitting and receiving optics (6) and with an evaluation circuit (10). The optoelectronic sensor has an especially simple structure in that there is only one single optoelectronic transmitting and receiving component (14) which sequentially acts as both the opto-transmitter and the opto-receiver in succession in time.

摘要翻译： 一种光电传感器，特别是反射光电屏障和反射光感测装置，用于检测被监视区域中的物体（2），具有带有发射和接收光学器件（6）的外壳（3）和评估电路（10） ）。 光电传感器具有特别简单的结构，其中只有一个单独的光电发射和接收部件（14）在时间上连续地依次作为光发射器和光接收器。

公开(公告)号：US06529028B1

公开(公告)日：2003-03-04

申请号：US09302649

申请日：1999-04-30

申请人： Dieter Härle ,  Patrick Heyne ,  Martin Buck

发明人： Dieter Härle ,  Patrick Heyne ,  Martin Buck

IPC分类号： G01R3128

CPC分类号： G11C29/006 ,  G11C29/26 ,  G11C29/48 ,  G11C29/56

摘要： A configuration for testing a plurality of memory chips on a wafer, in which needles are used to supply the memory chips with supply voltages, an initialization signal, a read signal, a clock signal as well as address, data and control signals. The address, data and control signals are in this case produced by a logic device disposed in an edge area of the memory chip and are supplied directly to the memory chips.

摘要翻译： 用于测试晶片上的多个存储器芯片的配置，其中针被用于向存储器芯片提供电源电压，初始化信号，读取信号，时钟信号以及地址，数据和控制信号。 在这种情况下，地址，数据和控制信号由设置在存储器芯片的边缘区域中的逻辑器件产生并被直接提供给存储器芯片。

公开(公告)号：US06445091B1

公开(公告)日：2002-09-03

申请号：US09197369

申请日：1998-11-20

申请人： Martin Buck

发明人： Martin Buck

IPC分类号： H03K19003

CPC分类号： G11C5/14 ,  H03K19/018521 ,  Y10T307/858

摘要： An integrated semiconductor circuit has at least two supply networks that are supplied independently of one another. The two supply networks include a first, load supply network, which is associated with a load circuit, and a second, driver supply network, which is associated with a driver circuit. Each supply network has a ground path with ground lines and a supply path with supply potential lines which are separate from the ground path. A compensating circuit is provided which alternatively couples the ground paths and/or the supply paths of the at least two supply networks to one another.

摘要翻译： 集成半导体电路具有彼此独立地提供的至少两个供电网络。 两个供电网络包括与负载电路相关联的第一负载供应网络和与驱动器电路相关联的第二驱动器供电网络。 每个供电网络具有接地线的接地路径和具有与接地路径分开的供电电位线的供电路径。 提供补偿电路，其将至少两个供电网络的接地路径和/或供电路径交替地彼此耦合。