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    Compensating for transmitter nonlinearities
    1.
    发明授权
    Compensating for transmitter nonlinearities 有权

    公开(公告)号：US10756682B1

    公开(公告)日：2020-08-25

    申请号：US16779610

    申请日：2020-02-02

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Hananel Faig ,  Shai Cohen ,  Liron Gantz

    IPC: H04L25/49 ,  H03F1/32

    Abstract: A method for communication includes producing an error signal by comparing a driving signal applied to a transmitter to an output signal generated by the transmitter in response to the driving signal. The error signal is decomposed into a linear component having a first memory depth and a nonlinear component having one or more polynomial orders and a second memory depth that is less than the first memory depth. First coefficients, up to the first memory depth, of a linear predistortion kernel are computed for application to the driving signal so as to compensate for the linear component of the error signal. Second coefficients for the one or more polynomial orders, up to the second memory depth, of a nonlinear predistortion kernel are computed so as to compensate for the nonlinear component of the error signal. Operation of the transmitter is optimized using the first and second coefficients.

    Parallel decision feedback equalizer partitioned for high throughput
    2.
    发明授权
    Parallel decision feedback equalizer partitioned for high throughput 有权

    公开(公告)号：US11171816B2

    公开(公告)日：2021-11-09

    申请号：US16943615

    申请日：2020-07-30

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Matan Groen ,  Chen Gaist ,  Hananel Faig

    IPC: H04L25/03 ,  H04L7/00 ,  H04L7/033

    Abstract: In some disclosed embodiments, a Decision Feedback Equalizer (DFE) processes multiple symbols in parallel using a novel architecture that avoids violating a timing constraint. The DFE comprises Feed-Back (FB) filters that can be configured to equalizing nonlinear phenomena. Using a Look-Up Table (LUT)-based implementation, the FB filters may implement complex nonlinear functions at low hardware complexity, low latency and low power consumption. A LUT-based implementation of the FB filter supports adaptive FB filtering to changing channel conditions by updating LUT content.

    Compensating for transmitter nonlinearities
    3.
    发明申请
    Compensating for transmitter nonlinearities 审中-公开

    公开(公告)号：US20200252032A1

    公开(公告)日：2020-08-06

    申请号：US16779610

    申请日：2020-02-02

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Hananel Faig ,  Shai Cohen ,  Liron Gantz

    IPC: H03F1/32

    Abstract: A method for communication includes producing an error signal by comparing a driving signal applied to a transmitter to an output signal generated by the transmitter in response to the driving signal. The error signal is decomposed into a linear component having a first memory depth and a nonlinear component having one or more polynomial orders and a second memory depth that is less than the first memory depth. First coefficients, up to the first memory depth, of a linear predistortion kernel are computed for application to the driving signal so as to compensate for the linear component of the error signal. Second coefficients for the one or more polynomial orders, up to the second memory depth, of a nonlinear predistortion kernel are computed so as to compensate for the nonlinear component of the error signal. Operation of the transmitter is optimized using the first and second coefficients.

    Impairment detector for digital signals
    8.
    发明授权
    Impairment detector for digital signals 有权

    公开(公告)号：US11502815B2

    公开(公告)日：2022-11-15

    申请号：US17189313

    申请日：2021-03-02

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Hananel Faig ,  Raanan Ivry

    IPC: H04L7/00 ,  H04B17/29

    Abstract: A signal processing method includes receiving a digital signal including a sequence of samples. For each sample among at least some of the samples, a neighbor-based estimate is calculated over (i) one or more samples that precede the sample in the sequence and (ii) one or more samples that succeed the sample in the sequence, and an error value, indicative of a deviation of the neighbor-based estimate from an actual value of the sample, is calculating. An impairment in the digital signal is estimated based on a plurality of error values calculated for a plurality of the samples.

    CDR-based timing skew calibration
    10.
    发明授权
    CDR-based timing skew calibration 有权

    公开(公告)号：US10735010B1

    公开(公告)日：2020-08-04

    申请号：US16575445

    申请日：2019-09-19

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Hananel Faig ,  David Rohlin

    IPC: H03M1/06 ,  H04L7/00

    Abstract: In one embodiment, a time-interleaved analog-to-digital convertor (ADC) system, includes an array of ADCs to sample respective analog voltages at sampling times indicated by respective clock signals and to output corresponding digital values, phase generator circuitry to provide multiple, different phase-shifted clock signals for driving the respective sampling times of the ADCs, and a clock and data recovery circuit including ADC-specific first-order loop filters to derive respective ADC-specific average phase error corrections, and a shared loop filter to derive a shared average phase error correction over the array of ADCs and wherein the phase generator circuitry is coupled to provide corrected respective ones of the phase-shifted clock signals responsively to both respective ones of the ADC-specific average phase error corrections derived by respective ones of the first-order loop filters, and the shared average phase error correction derived by the shared loop filter.

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