公开(公告)号：US10658453B2

公开(公告)日：2020-05-19

申请号：US16037889

申请日：2018-07-17

Applicant: Microchip Technology Incorporated

Inventor： Justin Hiroki Sato ,  Yaojian Leng ,  Greg Stom

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/02

Abstract: A method for manufacturing a thin film resistor (TFR) module in an integrated circuit (IC) structure may include forming a trench in a dielectric region; forming a TFR element in the trench, the TFR element including a laterally-extending TFR region and a TFR ridge extending upwardly from a laterally-extending TFR region; depositing at least one metal layer over the TFR element; and patterning the at least one metal layer and etching the at least one metal layer using a metal etch to define a pair of metal TFR heads over the TFR element, wherein the metal etch also removes at least a portion of the upwardly-extending TFR ridge. The method may also include forming at least one conductive TFR contact extending through the TFR element and in contact with a respective TFR head to thereby increase a conductive path between the respective TFR head and the TFR element.

公开(公告)号：US10546947B2

公开(公告)日：2020-01-28

申请号：US16110330

申请日：2018-08-23

Applicant: Microchip Technology Incorporated

Inventor： Mel Hymas ,  Bomy Chen ,  Greg Stom ,  James Walls

IPC: H01L21/265 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/3213 ,  H01L29/423 ,  H01L29/66 ,  H01L29/788

Abstract: A method of forming a memory cell, e.g., flash memory cell, may include (a) depositing polysilicon over a substrate, (b) depositing a mask over the polysilicon, (c) etching an opening in the mask to expose a surface of the polysilicon, (d) growing a floating gate oxide at the exposed polysilicon surface, (e) depositing additional oxide above the floating gate oxide, such that the floating gate oxide and additional oxide collectively define an oxide cap, (f) removing mask material adjacent the oxide cap, (g) etching away portions of the polysilicon uncovered by the oxide cap, wherein a remaining portion of the polysilicon defines a floating gate, and (h) depositing a spacer layer over the oxide cap and floating gate. The spacer layer may includes a shielding region aligned over at least one upwardly-pointing tip region of the floating gate, which helps protect such tip region(s) from a subsequent source implant process.

公开(公告)号：US20190386091A1

公开(公告)日：2019-12-19

申请号：US16037889

申请日：2018-07-17

Applicant: Microchip Technology Incorporated

Inventor： Justin Hiroki Sato ,  Yaojian Leng ,  Greg Stom

IPC: H01L49/02 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/3213 ,  H01L23/522 ,  H01L21/768 ,  H01L21/285

Abstract: A method for manufacturing a thin film resistor (TFR) module in an integrated circuit (IC) structure may include forming a trench in a dielectric region; forming a TFR element in the trench, the TFR element including a laterally-extending TFR region and a TFR ridge extending upwardly from a laterally-extending TFR region; depositing at least one metal layer over the TFR element; and patterning the at least one metal layer and etching the at least one metal layer using a metal etch to define a pair of metal TFR heads over the TFR element, wherein the metal etch also removes at least a portion of the upwardly-extending TFR ridge. The method may also include forming at least one conductive TFR contact extending through the TFR element and in contact with a respective TFR head to thereby increase a conductive path between the respective TFR head and the TFR element.

公开(公告)号：US20190097027A1

公开(公告)日：2019-03-28

申请号：US16110330

申请日：2018-08-23

Applicant: Microchip Technology Incorporated

Inventor： Mel Hymas ,  Bomy Chen ,  Greg Stom ,  James Walls

IPC: H01L29/66 ,  H01L29/788 ,  H01L21/3213 ,  H01L21/3105 ,  H01L21/265

Abstract: A method of forming a memory cell, e.g., flash memory cell, may include (a) depositing polysilicon over a substrate, (b) depositing a mask over the polysilicon, (c) etching an opening in the mask to expose a surface of the polysilicon, (d) growing a floating gate oxide at the exposed polysilicon surface, (e) depositing additional oxide above the floating gate oxide, such that the floating gate oxide and additional oxide collectively define an oxide cap, (f) removing mask material adjacent the oxide cap, (g) etching away portions of the polysilicon uncovered by the oxide cap, wherein a remaining portion of the polysilicon defines a floating gate, and (h) depositing a spacer layer over the oxide cap and floating gate. The spacer layer may includes a shielding region aligned over at least one upwardly-pointing tip region of the floating gate, which helps protect such tip region(s) from a subsequent source implant process.

公开(公告)号：US10553336B2

公开(公告)日：2020-02-04

申请号：US16034423

申请日：2018-07-13

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng ,  Justin Sato ,  Greg Stom

IPC: H01C17/07 ,  H01C17/075 ,  H01C7/00 ,  H01C17/28 ,  H01C17/00 ,  H01C1/142

Abstract: A method for manufacturing a thin film resistor (TFR) module in an integrated circuit (IC) structure is provided. A TFR trench may be formed in an oxide layer. A resistive TFR layer may be deposited over the structure and extending into the trench. Portions of the TFR layer outside the trench may be removed by CMP to define a TFR element including a laterally-extending TFR bottom region and a plurality of TFR ridges extending upwardly from the laterally-extending TFR bottom region. At least one CMP may be performed to remove all or portions of the oxide layer and at least a partial height of the TFR ridges. A pair of spaced-apart metal interconnects may then be formed over opposing end regions of the TFR element, wherein each metal interconnect contacts a respective upwardly-extending TFR ridge, to thereby define a resistor between the metal interconnects via the TFR element.

公开(公告)号：US20190392967A1

公开(公告)日：2019-12-26

申请号：US16034423

申请日：2018-07-13

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng ,  Justin Sato ,  Greg Stom

IPC: H01C17/075 ,  H01C7/00 ,  H01C1/142 ,  H01C17/00 ,  H01C17/28

Abstract: A method for manufacturing a thin film resistor (TFR) module in an integrated circuit (IC) structure is provided. A TFR trench may be formed in an oxide layer. A resistive TFR layer may be deposited over the structure and extending into the trench. Portions of the TFR layer outside the trench may be removed by CMP to define a TFR element including a laterally-extending TFR bottom region and a plurality of TFR ridges extending upwardly from the laterally-extending TFR bottom region. At least one CMP may be performed to remove all or portions of the oxide layer and at least a partial height of the TFR ridges. A pair of spaced-apart metal interconnects may then be formed over opposing end regions of the TFR element, wherein each metal interconnect contacts a respective upwardly-extending TFR ridge, to thereby define a resistor between the metal interconnects via the TFR element.