公开(公告)号：US10431285B2

公开(公告)日：2019-10-01

申请号：US16184827

申请日：2018-11-08

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  G11C11/56 ,  H01L27/11507 ,  G11C14/00 ,  H01L27/11502

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may have a polarity opposite to the access voltage. A delay may be instituted between access attempts in order to discharge the untargeted memory cells.

公开(公告)号：US09613676B1

公开(公告)日：2017-04-04

申请号：US15197416

申请日：2016-06-29

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  G11C11/56 ,  H01L27/11507 ,  G11C14/00 ,  H01L27/11502

CPC classification number: G11C11/2275 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2253 ,  G11C11/2273 ,  G11C11/5657 ,  G11C14/00 ,  H01L27/11502 ,  H01L27/11507

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells.

公开(公告)号：US20190139591A1

公开(公告)日：2019-05-09

申请号：US16184827

申请日：2018-11-08

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  H01L27/11507 ,  G11C11/56 ,  G11C14/00

CPC classification number: G11C11/2275 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2253 ,  G11C11/2273 ,  G11C11/5657 ,  G11C14/00 ,  H01L27/11502 ,  H01L27/11507

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells.

公开(公告)号：US10153026B2

公开(公告)日：2018-12-11

申请号：US15858831

申请日：2017-12-29

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  G11C11/56 ,  H01L27/11507 ,  G11C14/00 ,  H01L27/11502

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells.

公开(公告)号：US09928894B2

公开(公告)日：2018-03-27

申请号：US15438462

申请日：2017-02-21

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  G11C14/00 ,  G11C11/56 ,  H01L27/11507 ,  H01L27/11502

CPC classification number: G11C11/2275 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2253 ,  G11C11/2273 ,  G11C11/5657 ,  G11C14/00 ,  H01L27/11502 ,  H01L27/11507

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells.

公开(公告)号：US20180005682A1

公开(公告)日：2018-01-04

申请号：US15438462

申请日：2017-02-21

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  G11C14/00 ,  H01L27/11507 ,  G11C11/56 ,  H01L27/11502

CPC classification number: G11C11/2275 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2253 ,  G11C11/2273 ,  G11C11/5657 ,  G11C14/00 ,  H01L27/11502 ,  H01L27/11507

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells.

公开(公告)号：US20180137908A1

公开(公告)日：2018-05-17

申请号：US15858831

申请日：2017-12-29

Applicant: Micron Technology, Inc.

Inventor： Bei Wang ,  Alessandro Calderoni ,  Wayne Kinney ,  Adam Johnson ,  Durai Vishak Nirmal Ramaswamy

IPC: G11C11/22 ,  G11C11/56 ,  G11C14/00

CPC classification number: G11C11/2275 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2253 ,  G11C11/2273 ,  G11C11/5657 ,  G11C14/00 ,  H01L27/11502 ,  H01L27/11507

Abstract: Methods, systems, and devices for preventing disturb of untargeted memory cells during repeated access operations of target memory cells are described for a non-volatile memory array. Multiple memory cells may be in electronic communication with a common conductive line, and each memory cell may have an electrically non-linear selection component. Following an access operation (e.g., a read or write operation) of a target memory cell, untargeted memory cells may be discharged by applying a discharge voltage to the common conductive line. The discharge voltage may, for example, have a polarity opposite to the access voltage. In other examples, a delay may be instituted between access attempts in order to discharge the untargeted memory cells.