公开(公告)号：US11222825B2

公开(公告)日：2022-01-11

申请号：US16814750

申请日：2020-03-10

申请人： Micron Technology, Inc.

发明人： Corey Staller ,  Anilkumar Chandolu

IPC分类号： H01L21/8234 ,  H01L27/11582 ,  H01L27/11556

摘要： A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. A stair-step structure is formed into the stack. A first liquid is applied onto the stair-step structure. The first liquid comprises insulative physical objects that individually have at least one of a maximum submicron dimension or a minimum submicron dimension. The first liquid is removed to leave the insulative physical objects touching one another and to have void-spaces among the touching insulative physical objects. A second liquid that is different from the first liquid is applied into the void-spaces. The second liquid is changed into a solid insulative material in the void-spaces. Other embodiments, including structure, are disclosed.

公开(公告)号：US20210287943A1

公开(公告)日：2021-09-16

申请号：US16814750

申请日：2020-03-10

申请人： Micron Technology, Inc.

发明人： Corey Staller ,  Anilkumar Chandolu

IPC分类号： H01L21/8234 ,  H01L27/11556 ,  H01L27/11582

摘要： A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. A stair-step structure is formed into the stack. A first liquid is applied onto the stair-step structure. The first liquid comprises insulative physical objects that individually have at least one of a maximum submicron dimension or a minimum submicron dimension. The first liquid is removed to leave the insulative physical objects touching one another and to have void-spaces among the touching insulative physical objects. A second liquid that is different from the first liquid is applied into the void-spaces. The second liquid is changed into a solid insulative material in the void-spaces. Other embodiments, including structure, are disclosed.

公开(公告)号：US12087632B2

公开(公告)日：2024-09-10

申请号：US17542787

申请日：2021-12-06

申请人： Micron Technology, Inc.

发明人： Corey Staller ,  Anilkumar Chandolu

IPC分类号： H01L21/02 ,  H01L21/8234 ,  H10B41/27 ,  H10B43/27

CPC分类号： H01L21/823412 ,  H01L21/02112 ,  H01L21/02225 ,  H01L21/02282 ,  H01L21/02321 ,  H01L21/02343 ,  H01L21/823437 ,  H10B41/27 ,  H10B43/27

摘要： A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. A stair-step structure is formed into the stack. A first liquid is applied onto the stair-step structure. The first liquid comprises insulative physical objects that individually have at least one of a maximum submicron dimension or a minimum submicron dimension. The first liquid is removed to leave the insulative physical objects touching one another and to have void-spaces among the touching insulative physical objects. A second liquid that is different from the first liquid is applied into the void-spaces. The second liquid is changed into a solid insulative material in the void-spaces. Other embodiments, including structure, are disclosed.

公开(公告)号：US11387369B2

公开(公告)日：2022-07-12

申请号：US16723259

申请日：2019-12-20

申请人： Micron Technology, Inc.

发明人： Shen Hu ,  Hung-Wei Liu ,  Xiao Li ,  Zhiqiang Xie ,  Corey Staller ,  Jeffery B. Hull ,  Anish A. Khandekar ,  Thomas A. Figura

IPC分类号： H01L27/108 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

摘要： An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.

公开(公告)号：US20220093467A1

公开(公告)日：2022-03-24

申请号：US17542787

申请日：2021-12-06

申请人： Micron Technology, Inc.

发明人： Corey Staller ,  Anilkumar Chandolu

IPC分类号： H01L21/8234 ,  H01L27/11582 ,  H01L27/11556 ,  H01L21/02

摘要： A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. A stair-step structure is formed into the stack. A first liquid is applied onto the stair-step structure. The first liquid comprises insulative physical objects that individually have at least one of a maximum submicron dimension or a minimum submicron dimension. The first liquid is removed to leave the insulative physical objects touching one another and to have void-spaces among the touching insulative physical objects. A second liquid that is different from the first liquid is applied into the void-spaces. The second liquid is changed into a solid insulative material in the void-spaces. Other embodiments, including structure, are disclosed.

公开(公告)号：US20210193843A1

公开(公告)日：2021-06-24

申请号：US16723259

申请日：2019-12-20

申请人： Micron Technology, Inc.

发明人： Shen Hu ,  Hung-Wei Liu ,  Xiao Li ,  Zhiqiang Xie ,  Corey Staller ,  Jeffery B. Hull ,  Anish A. Khandekar ,  Thomas A. Figura

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L29/66

摘要： An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.