公开(公告)号：US20250007462A1

公开(公告)日：2025-01-02

申请号：US18589512

申请日：2024-02-28

Applicant: NEC Corporation

Inventor： Tsuyoshi YAMAMOTO ,  Yoshihito HASHIMOTO

IPC: H03B15/00 ,  G06N10/00

Abstract: An oscillation apparatus includes: an oscillator including a resonator and a magnetic-field generating unit, the resonator including a loop circuit and a capacitor, the loop circuit including a first superconducting line, a first Josephson junction, a second superconducting line, and a second Josephson junction connected in a ring shape, the magnetic-field generating unit being configured to apply a magnetic field to the loop circuit, and the oscillator being configured to perform parametric oscillation; a read-out unit for reading out an internal state of the oscillator; and a filter configured to restrict transmission of a signal in a predetermined frequency band. A circuit in which the capacitor and the loop circuit are connected in a ring shape is connected to the read-out unit through the filter.

公开(公告)号：US20240202560A1

公开(公告)日：2024-06-20

申请号：US18286719

申请日：2022-04-13

Applicant: NEC CORPORATION ,  National Institute of Advanced Industrial Science and Technology ,  NATIONAL UNIVERSITY CORPORATION YOKOHAMA NATIONAL UNIVERSITY

Inventor： Naoki TAKEUCHI ,  Nobuyuki YOSHIKAWA ,  Yoshihito HASHIMOTO ,  Tsuyoshi YAMAMOTO ,  Fuminori HIRAYAMA

IPC: G06N10/20 ,  G01R33/00 ,  G01R33/035 ,  H02M7/00

CPC classification number: G06N10/20 ,  G01R33/0011 ,  G01R33/035 ,  H02M7/003

Abstract: A magnetic flux bias circuit includes an input signal line to which an input signal indicating an applied magnetic flux using a digital value is input, a first current control line, a second current control line, and a third current control line to which a clock signal according to the input signal is input, a digital/analog conversion unit converting the input signal into an analog signal using a circuit including a quantum flux parametron circuit on the basis of the input signal input to the input signal line and the clock signal input to the first current control line, the second current control line, and the third current control line, and a magnetic flux application unit applying an applied magnetic flux to a controlled object on the basis of the analog signal output from the digital/analog conversion unit.

公开(公告)号：US20240016068A1

公开(公告)日：2024-01-11

申请号：US18341092

申请日：2023-06-26

Applicant: NEC Corporation ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Yohei KAWAKAMI ,  Yoshiro URADE ,  Yoshihito HASHIMOTO ,  Tsuyoshi YAMAMOTO

IPC: H10N60/12 ,  H10N60/80 ,  G06N10/40

CPC classification number: H10N60/12 ,  H10N60/805 ,  G06N10/40

Abstract: A superconducting quantum circuit includes: a first resonator having a superconducting quantum interference device and a capacitor that forms a closed loop together with the superconducting quantum interference device; and a control line being connected to a first control port and magnetically coupled to the superconducting quantum interference device, wherein the control line includes at least a first line having a characteristic impedance that indicates a first impedance value, and a second line being provided closer to a portion magnetically coupled to the superconducting quantum interference device than the first line and having a characteristic impedance that indicates a second impedance value being different from the first impedance value.

公开(公告)号：US20230171908A1

公开(公告)日：2023-06-01

申请号：US17994728

申请日：2022-11-28

Applicant: NEC Corporation

Inventor： Yoshihito HASHIMOTO ,  Tsuyoshi Yamamoto

IPC: H05K7/02 ,  H05K1/18

CPC classification number: H05K7/02 ,  H05K1/181

Abstract: A sample holder includes: a pedestal made of metal; and a PCB (Printed Circuit Board) placed on the pedestal. The PCB includes a through opening that penetrates from a front surface to a rear surface of the PCB. The pedestal includes a cavity bottomed and with a top of the pedestal opened, the cavity formed at a portion corresponding to directly under the through opening on a side of the pedestal on which the PCB is placed. As a configuration on the side on which the PCB is placed, viewed from above, a part of the cavity is protruded outward from the through opening.

公开(公告)号：US20220377880A1

公开(公告)日：2022-11-24

申请号：US17746212

申请日：2022-05-17

Applicant: NEC Corporation

Inventor： Yoshihito HASHIMOTO ,  Tsuyoshi YAMAMOTO ,  Kohei MATSUURA

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11

Abstract: A sample holder includes a base comprising a support structure and a printed circuit board (PCB) in contact with the base. The PCB has a through hole. The PCB has a cavity in at least a part of the base below the through hole. The support structure that supports a surface of a chip and is electrically connected to the base. The support structure is disposed in the cavity. At least a part of the section supporting the chip in the support structure is not parallel to the back surface of the chip.

公开(公告)号：US20230237362A1

公开(公告)日：2023-07-27

申请号：US18007769

申请日：2020-06-05

Applicant: NEC Corporation

Inventor： Akira MIYATA ,  Katsumi KIKUCHI ,  Suguru WATANABE ,  Takanori NISHI ,  Hideyuki SATOU ,  Tomohiro YAMAJI ,  Tsuyoshi YAMAMOTO ,  Yoshihito HASHIMOTO

IPC: G06N10/40 ,  G01R33/035

CPC classification number: G06N10/40 ,  G01R33/0354

Abstract: Provided is a quantum device capable of suppressing reduction in performance of quantum bit even when a quantum chip is flip-chip mounted on an interposer. A quantum chip (10) is flip-chip mounted on an interposer (20) by a bump (30). A coplanar line (12) coupling adjacent quantum bits is formed on the quantum chip (10). A gap (22) is provided, in the interposer (20), at a location facing a center conductor (12a) of the coplanar line (12). A second ground electrode (24) is formed around gap (22). The interposer (20) has a connection electrode (40) connecting the second ground electrode (24) around the gap (22). A bump (30A) formed in the vicinity of the connection electrode (40) is connected to the first ground electrode (12b) and the second ground electrode (24).

公开(公告)号：US20230162080A1

公开(公告)日：2023-05-25

申请号：US17974744

申请日：2022-10-27

Applicant: NEC Corporation

Inventor： Katsumi KIKUCHI ,  Akira MIYATA ,  Kunihiko ISHIHARA ,  Yoshihito HASHIMOTO

IPC: G06N10/40

CPC classification number: G06N10/40

Abstract: A quantum device includes a first quantum chip, a second quantum chip, and one or more interposer substrates mounting the first quantum chip and the second quantum chip. The first quantum chip and the second quantum chip mounted on a same or different interposer substrates, have surfaces with at least partial regions thereof opposing each other, and electrical connection is made between opposing connection terminals arranged in at least partial regions of the surfaces, opposed to each other, of the first quantum chip and the second quantum chip.

公开(公告)号：US20220377879A1

公开(公告)日：2022-11-24

申请号：US17746172

申请日：2022-05-17

Applicant: NEC Corporation

Inventor： Yoshihito HASHIMOTO ,  Tsuyoshi Yamamoto ,  Kohei Matsuura

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

Abstract: A sample holder includes a base comprising a support structure and a printed circuit board (PCB) in contact with the base. The PCB includes: a dielectric; a front-surface ground (GND) formed on a front surface of the dielectric; a back-surface GND formed on a back surface of the dielectric; a through hole penetrating from the front-surface GND to the back-surface GND, the through hole in which a chip is disposed, and a conductor that electrically connects the front-surface GND and the back-surface GND on an end face of the through hole. At least a part of the base below the through hole has a cavity. The support structure that supports a surface of the chip and is electrically connected to the base. The support structure is disposed in the cavity.

公开(公告)号：US20220263467A1

公开(公告)日：2022-08-18

申请号：US17625413

申请日：2020-06-26

Applicant: NEC Corporation

Inventor： Tsuyoshi YAMAMOTO ,  Yoshihito HASHIMOTO

IPC: H03B15/00 ,  G06N10/40 ,  H01L39/22

Abstract: An oscillation apparatus includes: an oscillator including a resonator and a magnetic-field generation unit, the resonator including a loop circuit and a capacitor, the loop circuit including a first superconducting line, a first Josephson junction, a second superconducting line, and a second Josephson junction connected in a ring shape, the magnetic-field generation unit being configured to apply a magnetic field to the loop circuit, and the oscillator being configured to perform parametric oscillation; a read-out unit for reading out an internal state of the oscillator; and a circuit component in which a coupling strength between the oscillator and the read-out unit is variable. The oscillator is connected to the read-out unit through the circuit component.

公开(公告)号：US20230276717A1

公开(公告)日：2023-08-31

申请号：US18007765

申请日：2020-06-05

Applicant: NEC Corporation

Inventor： Akira MIYATA ,  Katsumi KIKUCHI ,  Suguru WATANABE ,  Takanori NISHI ,  Hideyuki SATOU ,  Tomohiro YAMAJI ,  Tsuyoshi YAMAMOTO ,  Yoshihito HASHIMOTO

IPC: H10N60/10 ,  G06N10/40

CPC classification number: H10N60/10 ,  G06N10/40

Abstract: Provided are an oscillator and a quantum computer capable of suppressing an occupied area of a circuit. An oscillator (300) includes a resonator (100) including a plurality of loop circuits in which a first superconducting line (112a), a first Josephson junction (111a), a second superconducting line (112b), and a second Josephson junction (111b) are annularly connected, and a magnetic field application circuit (200) including an electrode that goes around in a predetermined shape and configured to apply a magnetic field to the loop circuit, in which the electrode is arranged so as to face at least two of the loop circuits.