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公开(公告)号：US20190131981A1
公开(公告)日：2019-05-02
申请号：US16118974
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Cicero Silveira Vaucher , Sander Derksen , Erwin Janssen , Bernardus Johannes Martinus Kup
CPC classification number: H03L7/0992 , H03L7/091 , H03L7/18 , H03L7/185 , H03L7/191
Abstract: There is disclosed an apparatus comprising a first phase-locked loop comprising: a phase detector (302, 304), arranged to receive a reference clock signal (306) and a feedback clock signal (308) and to output a frequency control signal based on a phase difference between the reference clock signal (306) and the feedback clock signal (308); a variable-frequency oscillator (312, 314) arranged to output an oscillator signal having a frequency dependent on said frequency control signal; first divider circuitry (316) for generating said feedback clock signal (308) by frequency-dividing said oscillator signal; and second divider circuitry (320) for generating an output clock signal (3220 by frequency-dividing said oscillator signal; wherein a phase relation between said first divider circuitry (316) and said second divider circuitry (320) is adjustable to delay or advance said output clock signal (322) relative to said feedback clock signal (308). The apparatus may be a radar receiver or transceiver.
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公开(公告)号：US11476838B1
公开(公告)日：2022-10-18
申请号：US17362353
申请日：2021-06-29
Applicant: NXP B.V.
Inventor： Sander Derksen , Jos Verlinden , Ids Christiaan Keekstra , Rene Verlinden
IPC: H03K3/0231 , H03K3/011
Abstract: Various embodiments relate to a free running oscillator, including: a voltage controlled oscillator circuit including an input configured to receive an input voltage and an output configured to provide an oscillation signal, wherein the input voltage controls a frequency of the oscillation signal; a frequency to voltage circuit including an input configured to receive the oscillation signal and an output configured to produce a voltage dependent on a frequency of the oscillation signal; a comparison circuit including an input and an output comprising: a first amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, wherein the first input received one of a reference voltage and the output of frequency to voltage circuit; a second amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, first input is connected to the comparator output, the second inputs is connected to the second amplifier output; a sampling capacitor connected between the second input of the first amplifier and a ground; and an integration capacitor connected between the comparator output and the ground.
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公开(公告)号：US10594327B2
公开(公告)日：2020-03-17
申请号：US16118974
申请日：2018-08-31
Applicant: NXP B.V.
Inventor： Cicero Silveira Vaucher , Sander Derksen , Erwin Janssen , Bernardus Johannes Martinus Kup
Abstract: There is disclosed an apparatus comprising a first phase-locked loop comprising: a phase detector (302, 304), arranged to receive a reference clock signal (306) and a feedback clock signal (308) and to output a frequency control signal based on a phase difference between the reference clock signal (306) and the feedback clock signal (308); a variable-frequency oscillator (312, 314) arranged to output an oscillator signal having a frequency dependent on said frequency control signal; first divider circuitry (316) for generating said feedback clock signal (308) by frequency-dividing said oscillator signal; and second divider circuitry (320) for generating an output clock signal (3220 by frequency-dividing said oscillator signal; wherein a phase relation between said first divider circuitry (316) and said second divider circuitry (320) is adjustable to delay or advance said output clock signal (322) relative to said feedback clock signal (308). The apparatus may be a radar receiver or transceiver.
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Patent Agency Ranking
公开(公告)号：US10250269B2
公开(公告)日：2019-04-02
申请号：US15657255
申请日：2017-07-24
Applicant: NXP B.V.
Inventor： Jos Verlinden , Sander Derksen , Dobson Paul Parlindungan Simanjuntak , Remco Cornelis Herman Van de Beek
Abstract: An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output. During a second phase of the comparison circuit, the non inverting input receives the voltage produced by the frequency to voltage circuit and the switch between amplifier output and inverting input is open wherein the inverting input is coupled to the capacitor to receive the sampled voltage value. During the second phase, the output of the amplifier is provided to the input of the VCO circuit.
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公开(公告)号：US20240396532A1
公开(公告)日：2024-11-28
申请号：US18696599
申请日：2021-09-29
Applicant: NXP B.V.
Inventor： Maël Demarets , Gerard Villar Piqué , Sander Derksen , Fabio Sebastiano
IPC: H03K3/03
Abstract: A controllable oscillator including an upper oscillator coupled between an upper supply voltage and an upper intermediate node that provides at least one upper oscillating signal on at least one upper oscillating node, a lower oscillator coupled between a lower intermediate node and a lower supply voltage that provides at least one lower oscillating signal on at least one lower oscillating node, an oscillation controller coupled between the upper and lower intermediate nodes, and amplification circuitry coupled between the upper and lower supply voltages, having at least one upper input coupled to the at least one upper oscillating node, having at least one lower input coupled to the at least one lower oscillating node, and having a primary output node for providing a primary rail-to-rail oscillation signal. A coupling circuit may be coupled between one or more upper and lower oscillating nodes for synchronization.
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公开(公告)号：US11742834B2
公开(公告)日：2023-08-29
申请号：US17931867
申请日：2022-09-13
Applicant: NXP B.V.
Inventor： Sander Derksen , Jos Verlinden , Ids Christiaan Keekstra , René Verlinden
IPC: H03K3/0231 , H03K3/011
CPC classification number: H03K3/011 , H03K3/0231
Abstract: Various embodiments relate to a free running oscillator, that includes a switch capacitor based frequency-to-voltage converter (F2V), a comparator, and a voltage controlled oscillator (VCO), which may be collectively configured to reduce amplifier offset and flicker noise while increasing effective gain of the amplifier of the comparator. The F2V may produce a feedback voltage Vfb corresponding to frequencies of output of the VCO. The comparator may be configured to sample a reference voltage Vref using a sampling capacitor, compare Vref to Vfb, and generate an output based on any difference between Vref and Vfb, where the output may be integrated using an integrating capacitor of the comparator. The comparator may compensate for parasitic capacitance at the output of the amplifier by using an amplifier having two outputs, with the sampling capacitor and integrating capacitor being coupled to respectively different outputs of the amplifier.
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公开(公告)号：US20230006655A1
公开(公告)日：2023-01-05
申请号：US17931867
申请日：2022-09-13
Applicant: NXP B.V.
Inventor： Sander Derksen , Jos Verlinden , Ids Christiaan Keekstra , René Verlinden
IPC: H03K3/011 , H03K3/0231
Abstract: Various embodiments relate to a free running oscillator, that includes a switch capacitor based frequency-to-voltage converter (F2V), a comparator, and a voltage controlled oscillator (VCO), which may be collectively configured to reduce amplifier offset and flicker noise while increasing effective gain of the amplifier of the comparator. The F2V may produce a feedback voltage Vfb corresponding to frequencies of output of the VCO. The comparator may be configured to sample a reference voltage Vref using a sampling capacitor, compare Vref to Vfb, and generate an output based on any difference between Vref and Vfb, where the output may be integrated using an integrating capacitor of the comparator. The comparator may compensate for parasitic capacitance at the output of the amplifier by using an amplifier having two outputs, with the sampling capacitor and integrating capacitor being coupled to respectively different outputs of the amplifier.
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公开(公告)号：US20190028110A1
公开(公告)日：2019-01-24
申请号：US15657255
申请日：2017-07-24
Applicant: NXP B.V.
Inventor： JOS VERLINDEN , Sander Derksen , Dobson Paul Parlindungan Simanjuntak , Remco Cornelis Herman Van de Beek
Abstract: An oscillator system includes a voltage controlled oscillator (VCO) circuit. The VCO circuit includes an output for providing an oscillation signal and input to receive a voltage that controls the frequency of the oscillation signal. The oscillator system includes a frequency to voltage circuit that receives the oscillation signal and produces a voltage that is dependent upon the frequency of the oscillation signal. The oscillator system includes a comparison circuit including an amplifier. The amplifier includes an inverting input, a non inverting input, and an output. During a first phase of the comparison circuit, the non inverting input receives a reference voltage and the inverting input is coupled to the output of the amplifier via a switch and to a capacitor wherein the capacitor samples the voltage of the output. During a second phase of the comparison circuit, the non inverting input receives the voltage produced by the frequency to voltage circuit and the switch between amplifier output and inverting input is open wherein the inverting input is coupled to the capacitor to receive the sampled voltage value. During the second phase, the output of the amplifier is provided to the input of the VCO circuit.
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