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    Process for manufacturing semiconductor integrated circuit device
    3.
    发明授权
    Process for manufacturing semiconductor integrated circuit device 有权
    半导体集成电路器件制造工艺

    公开(公告)号：US08129275B2

    公开(公告)日：2012-03-06

    申请号：US12700784

    申请日：2010-02-05

    申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    IPC分类号： H01L21/44

    CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

    摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

    摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

    PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    4.
    发明申请
    PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    制造半导体集成电路器件的工艺

    公开(公告)号：US20100136786A1

    公开(公告)日：2010-06-03

    申请号：US12700784

    申请日：2010-02-05

    申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    IPC分类号： H01L21/768

    CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

    摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

    摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

    PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    6.
    发明申请
    PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    制造半导体集成电路器件的工艺

    公开(公告)号：US20080233736A1

    公开(公告)日：2008-09-25

    申请号：US12127564

    申请日：2008-05-27

    申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

    摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

    摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

    Process for manufacturing semiconductor integrated circuit device
    7.
    发明申请
    Process for manufacturing semiconductor integrated circuit device 有权
    半导体集成电路器件制造工艺

    公开(公告)号：US20060141792A1

    公开(公告)日：2006-06-29

    申请号：US11357181

    申请日：2006-02-21

    申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    IPC分类号： H01L21/44

    CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

    摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP). method, a process for manufacturing. a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

    摘要翻译： 为了提供通过化学机械抛光（CMP）形成的金属配线的防腐蚀技术。 方法，制造方法。 根据本发明的半导体集成电路器件包括以下步骤：在晶片的主面上形成Cu（或含有Cu作为主要成分的Cu合金）的金属层，然后通过化学机械抛光使金属层平坦化 （CMP）方法形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

    Process for manufacturing semiconductor integrated circuit device
    8.
    发明授权
    Process for manufacturing semiconductor integrated circuit device 有权
    半导体集成电路器件制造工艺

    公开(公告)号：US06800557B2

    公开(公告)日：2004-10-05

    申请号：US10369716

    申请日：2003-02-21

    申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    IPC分类号： H01L21302

    CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

    摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

    摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。

    Process for manufacturing semiconductor integrated circuit device
    9.
    发明授权
    Process for manufacturing semiconductor integrated circuit device 有权
    半导体集成电路器件制造工艺

    公开(公告)号：US07659201B2

    公开(公告)日：2010-02-09

    申请号：US12127564

    申请日：2008-05-27

    申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

    IPC分类号： H01L21/44

    CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

    摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

    摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。