Guaranteed in-order packet delivery
    1.
    发明授权
    Guaranteed in-order packet delivery 有权
    保证按顺序分组传送

    公开(公告)号:US09584637B2

    公开(公告)日:2017-02-28

    申请号:US14184455

    申请日:2014-02-19

    Abstract: Circuitry to provide in-order packet delivery. A packet descriptor including a sequence number is received. It is determined in which of three ranges the sequence number resides. Depending, at least in part, on the range in which the sequence number resides it is determined if the packet descriptor is to be communicated to a scheduler which causes an associated packet to be transmitted. If the sequence number resides in a first “flush” range, all associated packet descriptors are output. If the sequence number resides in a second “send” range, only the received packet descriptor is output. If the sequence number resides in a third “store and reorder” range and the sequence number is the next in-order sequence number the packet descriptor is output; if the sequence number is not the next in-order sequence number the packet descriptor is stored in a buffer and a corresponding valid bit is set.

    Abstract translation: 电路提供按顺序分组传送。 接收包括序列号的分组描述符。 确定序列号所在的三个范围中的哪一个。 至少部分地依赖于序列号所在的范围,确定分组描述符是否被传送到导致相关分组被发送的调度器。 如果序列号位于第一个“刷新”范围内,则输出所有关联的数据包描述符。 如果序列号位于第二个“发送”范围内,则仅输出接收到的包描述符。 如果序列号位于第三个“存储和重新排序”范围,并且序列号是下一个顺序序列号,则输出数据包描述符; 如果序列号不是下一个顺序序列号,则分组描述符被存储在缓冲器中并且相应的有效位被置位。

    PACKET STORAGE DISTRIBUTION BASED ON AVAILABLE MEMORY
    2.
    发明申请
    PACKET STORAGE DISTRIBUTION BASED ON AVAILABLE MEMORY 有权
    基于可用内存的分组存储分配

    公开(公告)号:US20160099881A1

    公开(公告)日:2016-04-07

    申请号:US14507643

    申请日:2014-10-06

    CPC classification number: H04L49/9084

    Abstract: A method for receiving a packet descriptor including a priority indicator and a queue number indicating a queue stored within a first memory unit, storing a packet associated with the packet descriptor in a second memory, determining a first amount of free memory in the first memory unit, determining if the first amount of free memory is above a threshold value, writing the packet from the second memory to a third memory when the first amount of memory is above the threshold value and the priority indicator is equal to a first value, not writing the packet from the second memory unit to the third memory unit if the first amount of memory is below the threshold value or when the priority indicator is equal to a second value. The priority indicator is equal to a first value for high priority packets and a second value for low priority packets.

    Abstract translation: 一种用于接收包括优先级指示符和指示存储在第一存储器单元内的队列的队列号的分组描述符的方法,将与所述分组描述符相关联的分组存储在第二存储器中,确定所述第一存储器单元中的第一空闲存储器量 当所述第一存储器容量高于所述阈值并且所述优先级指示符等于第一值时,确定所述第一数量的可用存储器是否高于阈值,将所述第二存储器的数据包写入第三存储器, 如果第一存储器量低于阈值或当优先级指示符等于第二值时,从第二存储器单元到第三存储器单元的分组。 优先级指示符等于高优先级数据包的第一个值,低优先级数据包的第二个值。

    Update packet sequence number packet ready command

    公开(公告)号:US10341246B1

    公开(公告)日:2019-07-02

    申请号:US14530761

    申请日:2014-11-02

    Abstract: A method of performing an update packet sequence number packet ready command (drop packet mode operation) is described herein. A first packet ready command is received from a memory system via a bus and onto a first network interface circuit. The first packet ready command includes a multicast value. A first communication mode is determined as a function of the multicast value. The multicast value indicates a single packet was communicated by a second network interface circuit. A packet sequence number stored in a memory unit is updated. The memory unit is included in the first network interface circuit. The first network interface circuit does not free the first packet from the memory system. The network interface circuits and the memory system are included on an Island-Based Network Flow Processor. The bus is a Command/Push/Pull (CPP) bus.

    Simultaneous queue random early detection dropping and global random early detection dropping system

    公开(公告)号:US09705811B2

    公开(公告)日:2017-07-11

    申请号:US14507652

    申请日:2014-10-06

    CPC classification number: H04L47/326 H04L47/6275 H04L49/00

    Abstract: A method for receiving a packet descriptor associated with a packet and a queue number indicating a queue stored within a memory unit, determining a priority level of the packet and an amount of free memory available in the memory unit. Applying a global drop probability to generate a global drop indicator and applying a queue drop probability to generate a queue drop indicator. The global drop probability is a function of the amount of free memory. The queue drop probability is a function of instantaneous queue depth or drop precedence value. The packet is transmitted whenever the priority level is high. When the priority level is low, the packet is transmitted when both the global drop indicator and the queue drop indicator are a logic low value. When the priority level is low, the packet is not transmitted when either drop indicator is a logic low value.

    Instantaneous random early detection packet dropping with drop precedence
    5.
    发明授权
    Instantaneous random early detection packet dropping with drop precedence 有权
    瞬时随机早期检测丢包,丢弃优先级

    公开(公告)号:US09485195B2

    公开(公告)日:2016-11-01

    申请号:US14507602

    申请日:2014-10-06

    CPC classification number: H04L49/00

    Abstract: A circuit that receives queue number that indicates a queue stored within a memory unit and a packet descriptor that includes a drop precedence value, and in response determines an instantaneous queue depth of the queue. The instantaneous queue depth and drop precedence value are used to determine a drop probability. The drop probability is used to randomly determine if the packet descriptor should be stored in the queue. When a packet descriptor is not stored in a queue the packet associated with the packet descriptor is dropped. The queue has a first queue depth range. A first drop probability is used when the queue depth is within the first queue depth range and the drop precedence is equal to the first value. A second drop probability is used when the queue depth is within the first queue depth range and the drop precedence equal to a second value.

    Abstract translation: 接收指示存储在存储器单元中的队列的队列号的电路和包括丢弃优先级值的包描述符,并且作为响应确定队列的瞬时队列深度。 瞬时队列深度和丢弃优先级值用于确定丢弃概率。 丢弃概率用于随机确定包描述符是否应该存储在队列中。 当分组描述符不存储在队列中时,与分组描述符关联的分组被丢弃。 队列具有第一个队列深度范围。 当队列深度在第一队列深度范围内且丢弃优先级等于第一个值时,将使用第一个丢弃概率。 当队列深度在第一队列深度范围内并且丢弃优先级等于第二值时,使用第二丢弃概率。

    GUARANTEED IN-ORDER PACKET DELIVERY
    6.
    发明申请
    GUARANTEED IN-ORDER PACKET DELIVERY 有权
    保证订单分发

    公开(公告)号:US20150237180A1

    公开(公告)日:2015-08-20

    申请号:US14184455

    申请日:2014-02-19

    Abstract: Circuitry to provide in-order packet delivery. A packet descriptor including a sequence number is received. It is determined in which of three ranges the sequence number resides. Depending, at least in part, on the range in which the sequence number resides it is determined if the packet descriptor is to be communicated to a scheduler which causes an associated packet to be transmitted. If the sequence number resides in a first “flush” range, all associated packet descriptors are output. If the sequence number resides in a second “send” range, only the received packet descriptor is output. If the sequence number resides in a third “store and reorder” range and the sequence number is the next in-order sequence number the packet descriptor is output; if the sequence number is not the next in-order sequence number the packet descriptor is stored in a buffer and a corresponding valid bit is set.

    Abstract translation: 电路提供按顺序分组传送。 接收包括序列号的分组描述符。 确定序列号所在的三个范围中的哪一个。 至少部分地依赖于序列号所在的范围,确定分组描述符是否被传送到导致相关分组被发送的调度器。 如果序列号位于第一个“刷新”范围内,则输出所有关联的数据包描述符。 如果序列号位于第二个“发送”范围内,则仅输出接收到的包描述符。 如果序列号位于第三个“存储和重新排序”范围,并且序列号是下一个顺序序列号,则输出数据包描述符; 如果序列号不是下一个顺序序列号,则分组描述符被存储在缓冲器中并且相应的有效位被置位。

    Unicast packet ready command
    7.
    发明授权

    公开(公告)号:US09727513B1

    公开(公告)日:2017-08-08

    申请号:US14530760

    申请日:2014-11-02

    CPC classification number: G06F13/4027 G06F3/0613 G06F3/0647 G06F3/0683

    Abstract: A method of performing an unicast packet ready command (unicast mode operation) is described herein. A packet ready command is received from a memory system via a bus and onto a network interface circuit. The packet ready command includes a multicast value. A communication mode is determined as a function of the multicast value. The multicast value indicates a single packet is to be communicated to a single destination by the network interface circuit. A free packet command is outputted from the network interface circuit onto the bus. The free packet command includes a Free On Last Transfer (FOLT) value that indicates that the packet is to be freed from the memory system by the network interface circuit after the packet is communicated to the network interface circuit. The network interface circuit and the memory system are included on an Island-Based Network Flow Processor.

    Instantaneous random early detection packet dropping
    8.
    发明授权
    Instantaneous random early detection packet dropping 有权
    瞬时随机早期检测分组丢弃

    公开(公告)号:US09319333B2

    公开(公告)日:2016-04-19

    申请号:US14205824

    申请日:2014-03-12

    CPC classification number: H04L47/326 H04L47/29 H04L47/30 H04L47/54

    Abstract: A device that receives a packet descriptor and a queue number that indicates a queue stored within a memory unit, and in response determines an instantaneous queue depth of the queue. The instantaneous queue depth is used to determine a drop probability. The drop probability is used to randomly determine if the packet descriptor should be stored in the queue. The queue has a first queue depth range and a second queue depth range that do not overlap. A first drop probability is associated with the first queue depth range and a second drop probability is associated with the second queue depth range. The first drop probability is used when the queue depth is within the first queue depth range. The second drop probability is used with the queue depth is within the second queue depth range. The device includes a random value generator and a drop indicator generator.

    Abstract translation: 接收分组描述符的设备和指示存储在存储器单元中的队列的队列号,并且作为响应确定队列的瞬时队列深度。 瞬时队列深度用于确定丢弃概率。 丢弃概率用于随机确定包描述符是否应该存储在队列中。 队列具有不重叠的第一队列深度范围和第二队列深度范围。 第一丢弃概率与第一队列深度范围相关联,并且第二丢弃概率与第二队列深度范围相关联。 当队列深度在第一队列深度范围内时,使用第一个丢弃概率。 第二个丢弃概率用于队列深度在第二个队列深度范围内。 该装置包括随机值发生器和下降指示器发生器。

    SIMULTANEOUS QUEUE RANDOM EARLY DETECTION DROPPING AND GLOBAL RANDOM EARLY DETECTION DROPPING SYSTEM
    9.
    发明申请
    SIMULTANEOUS QUEUE RANDOM EARLY DETECTION DROPPING AND GLOBAL RANDOM EARLY DETECTION DROPPING SYSTEM 有权
    同时排队随机早期检测和全球随机早期检测系统

    公开(公告)号:US20160099882A1

    公开(公告)日:2016-04-07

    申请号:US14507652

    申请日:2014-10-06

    CPC classification number: H04L47/326 H04L47/6275 H04L49/00

    Abstract: A method for receiving a packet descriptor associated with a packet and a queue number indicating a queue stored within a memory unit, determining a priority level of the packet and an amount of free memory available in the memory unit. Applying a global drop probability to generate a global drop indicator and applying a queue drop probability to generate a queue drop indicator. The global drop probability is a function of the amount of free memory. The queue drop probability is a function of instantaneous queue depth or drop precedence value. The packet is transmitted whenever the priority level is high. When the priority level is low, the packet is transmitted when both the global drop indicator and the queue drop indicator are a logic low value. When the priority level is low, the packet is not transmitted when either drop indicator is a logic low value.

    Abstract translation: 一种用于接收与分组相关联的分组描述符的方法和指示存储在存储器单元中的队列的队列号,确定分组的优先级和可用存储器单元中的可用内存量。 应用全局丢弃概率来生成全局丢弃指示符并应用队列丢弃概率来生成队列丢弃指示符。 全局丢弃概率是空闲内存量的函数。 队列丢弃概率是瞬时队列深度或丢弃优先级值的函数。 每当优先级高时,传输数据包。 当优先级低时,当全局丢弃指示符和队列丢弃指示符均为逻辑低值时,传输数据包。 当优先级低时,当任一个丢包指示符为逻辑低电平值时,该数据包不传输。

    GLOBAL RANDOM EARLY DETECTION PACKET DROPPING BASED ON AVAILABLE MEMORY
    10.
    发明申请
    GLOBAL RANDOM EARLY DETECTION PACKET DROPPING BASED ON AVAILABLE MEMORY 有权
    基于可用内存的全球随机早期检测包

    公开(公告)号:US20160099880A1

    公开(公告)日:2016-04-07

    申请号:US14507621

    申请日:2014-10-06

    CPC classification number: H04L49/9084

    Abstract: An apparatus and method for receiving a packet descriptor and a queue number that indicates a queue stored within a memory unit, determining a first amount of free memory in a group of packet descriptor queues, determining if the first amount of free memory is within a first range, applying a first drop probability to determine if the packet associated with the packet descriptor should be dropped when the first amount of free memory is within the first range, and applying a second drop probability to determine if the packet should be dropped when the first amount of free memory is within a second range. When it is determined that the packet is to be dropped, the packet descriptor is not stored in the queue. When it is determined that the packet is not to be dropped, the packet descriptor is stored in the queue.

    Abstract translation: 一种用于接收分组描述符和指示存储在存储器单元中的队列的队列号的装置和方法,确定一组分组描述符队列中的第一空闲存储器量,确定第一量的可用存储器是否在第一 范围,应用第一丢弃概率来确定当所述第一空闲内存量在所述第一范围内时是否应该丢弃与所述分组描述符相关联的分组,以及应用第二丢弃概率来确定当所述第一丢弃概率是否在所述第一 可用内存量在第二范围内。 当确定要丢弃分组时,分组描述符不存储在队列中。 当确定分组不被丢弃时,分组描述符被存储在队列中。

Patent Agency Ranking