公开(公告)号：US20180225066A1

公开(公告)日：2018-08-09

申请号：US15944041

申请日：2018-04-03

Applicant: QUALCOMM Incorporated

Inventor： Olivier Alavoine ,  Sejoong Lee ,  Tauseef Kazi ,  Simon Booth ,  Edoardo Regini ,  Renatas Jakushokas ,  Saurabh Patodia ,  Jeffrey Gemar ,  Michael Hawjing Lo ,  Vinod Chamarty ,  Boris Andreev ,  Tao Shen ,  Aravind Bhaskara ,  Wenbiao Wang ,  Stephen Molloy

IPC: G06F3/06 ,  G06F1/32 ,  G06F12/08

CPC classification number: G06F3/0659 ,  G06F1/3275 ,  G06F3/0625 ,  G06F3/0673 ,  G06F12/08 ,  Y02D10/13 ,  Y02D10/14

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

公开(公告)号：US20130285696A1

公开(公告)日：2013-10-31

申请号：US13928424

申请日：2013-06-27

Applicant: QUALCOMM Incorporated

Inventor： Lew Chua-Eoan ,  Boris Andreev ,  Yuancheng Christopher Pan ,  Amirali Shayan ,  Xiaohua Kong ,  Mikhail Popovich ,  Mauricio Calle ,  IK-Joon Chang

IPC: G01R31/317

CPC classification number: G01R31/31721 ,  G01R29/26

Abstract: An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured.

Abstract translation: 片上传感器测量半导体芯片上的动态电源噪声，如电压下降。 采用原位逻辑，对芯片功能逻辑电源上存在的噪声敏感。 示例性功能逻辑包括芯片的微处理器，加法器和/或其他功能逻辑。 原位逻辑执行一些操作，并且执行该操作所需的时间量（即，操作延迟）对电源上存在的噪声敏感。 因此，通过评估原位逻辑的操作延迟，可以测量电源上存在的噪声量。

公开(公告)号：US10761774B2

公开(公告)日：2020-09-01

申请号：US15944041

申请日：2018-04-03

Applicant: QUALCOMM Incorporated

Inventor： Olivier Alavoine ,  Sejoong Lee ,  Tauseef Kazi ,  Simon Booth ,  Edoardo Regini ,  Renatas Jakushokas ,  Saurabh Patodia ,  Jeffrey Gemar ,  Michael Hawjing Lo ,  Vinod Chamarty ,  Boris Andreev ,  Tao Shen ,  Aravind Bhaskara ,  Wenbiao Wang ,  Stephen Molloy

IPC: G06F1/32 ,  G06F12/08 ,  G06F3/06 ,  G06F1/3234

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

公开(公告)号：US09965220B2

公开(公告)日：2018-05-08

申请号：US15016806

申请日：2016-02-05

Applicant: QUALCOMM Incorporated

Inventor： Olivier Alavoine ,  Sejoong Lee ,  Tauseef Kazi ,  Simon Booth ,  Edoardo Regini ,  Renatas Jakushokas ,  Saurabh Patodia ,  Jeffrey Gemar ,  Haw-Jing Lo ,  Vinod Chamarty ,  Boris Andreev ,  Tao Shen ,  Aravind Bhaskara ,  Wenbiao Wang ,  Stephen Molloy

IPC: G06F1/00 ,  G06F1/32 ,  G06F1/26 ,  G06F3/06

CPC classification number: G06F3/0659 ,  G06F1/3275 ,  G06F3/0625 ,  G06F3/0673 ,  G06F12/08 ,  Y02D10/13 ,  Y02D10/14

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

公开(公告)号：US20170228196A1

公开(公告)日：2017-08-10

申请号：US15016806

申请日：2016-02-05

Applicant: QUALCOMM Incorporated

Inventor： Olivier Alavoine ,  Sejoong Lee ,  Tauseef Kazi ,  Simon Booth ,  Edoardo Reginin ,  Renatas Jakushokas ,  Saurabh Patodia ,  Jeffery Gemar ,  Haw-Jing Lo ,  Vinod Chamarty ,  Boris Andreev ,  Tao Shen ,  Aravind Bhaskara ,  Wenbiao Wang ,  Stephen Molloy

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F1/3275 ,  G06F3/0625 ,  G06F3/0673 ,  G06F12/08 ,  Y02D10/13 ,  Y02D10/14

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.