公开(公告)号：US20150078497A1

公开(公告)日：2015-03-19

申请号：US14265877

申请日：2014-04-30

Applicant: QUALCOMM Incorporated

Inventor： Gang ZHANG ,  Frederic BOSSU

IPC: H04L27/26

CPC classification number: H04L27/2647 ,  H04B1/005

Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating local oscillator (LO) signals for multiple receive chains. One example circuit for generating first and second signals generally includes a first voltage controlled oscillator (VCO) configured to output the first signal at a first frequency and associated with a first receive chain for receiving a first carrier of an aggregated resource; and a second VCO configured to output the second signal at a second frequency and associated with a second receive chain for receiving a second carrier of the aggregated resource. The second frequency is different than the first frequency. In this manner, pulling or coupling between the two VCOs may be avoided, even if the two VCOs are implemented on the same radio frequency integrated circuit (RFIC).

Abstract translation: 本公开的某些方面提供了用于为多个接收链产生本地振荡器（LO）信号的方法和装置。 用于产生第一和第二信号的示例电路通常包括被配置为以第一频率输出第一信号并与第一接收链相关联的第一压控振荡器（VCO），用于接收聚合资源的第一载波; 以及第二VCO，被配置为以第二频率输出第二信号并与第二接收链相关联，用于接收聚合资源的第二载波。 第二频率与第一频率不同。 以这种方式，即使两个VCO实现在相同的射频集成电路（RFIC）上，也可以避免两个VCO之间的拉或耦合。

公开(公告)号：US20210351696A1

公开(公告)日：2021-11-11

申请号：US17443093

申请日：2021-07-20

Applicant: QUALCOMM Incorporated

Inventor： Yung-Chung LO ,  Gang ZHANG ,  Yiping HAN ,  Frederic BOSSU ,  Tsai-Pi HUNG ,  Jae-Hong CHANG

IPC: H02M3/156 ,  H02M1/00 ,  G05F1/575

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus may be a regulator circuit. The regulator circuit includes a first voltage regulator to regulate a first input voltage to the first voltage regulator, the first voltage regulator including a P-type metal-oxide-semiconductor (PMOS), a second voltage regulator to regulate a second input voltage to the second voltage regulator, and a switch circuit to selectively activate at least one of the first voltage regulator or the second voltage regulator. In one aspect, the second voltage regulator includes an N-type metal-oxide-semiconductor (NMOS). In one aspect, the second voltage regulator comprises a two-stage operational transconductance amplifier (OTA) circuit. In an aspect, the first voltage regulator is coupled to the second voltage regulator.

公开(公告)号：US20180019756A1

公开(公告)日：2018-01-18

申请号：US15272307

申请日：2016-09-21

Applicant: QUALCOMM Incorporated

Inventor： Jingcheng ZHUANG ,  Xinhua CHEN ,  Frederic BOSSU ,  Yiwu TANG

IPC: H03L7/087 ,  H03L7/099 ,  H03L7/197 ,  H04L7/033

CPC classification number: H03L7/087 ,  H03L7/0898 ,  H03L7/099 ,  H03L7/191 ,  H03L7/1974 ,  H03L7/1976 ,  H04L7/033

Abstract: A phase locked loop has a frequency divider included in a feedback path. The frequency divider generates a first output and a delayed output. The phase locked loop also includes a charge pump to generate an output current based on the first output and the delayed output of the frequency divider.

公开(公告)号：US20150349622A1

公开(公告)日：2015-12-03

申请号：US14630506

申请日：2015-02-24

Applicant: QUALCOMM Incorporated

Inventor： Yung-Chung LO ,  Gang ZHANG ,  Yiping HAN ,  Frederic BOSSU ,  Tsai-Pi HUNG ,  Jae-Hong CHANG

IPC: H02M1/00 ,  H02M3/156

CPC classification number: H02M3/156 ,  G05F1/575 ,  H02M1/00 ,  H02M2001/0077

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus may be a regulator circuit. The regulator circuit includes a first voltage regulator to regulate a first input voltage to the first voltage regulator, the first voltage regulator including a P-type metal-oxide-semiconductor (PMOS), and a second voltage regulator to regulate a second input voltage to the second voltage regulator, the second voltage regulator including an N-type metal-oxide-semiconductor (NMOS). In an aspect, the first voltage regulator is coupled to the second voltage regulator.

Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置可以是调节器电路。 调节器电路包括第一电压调节器，用于调节到第一电压调节器的第一输入电压，第一电压调节器包括P型金属氧化物半导体（PMOS）和第二电压调节器，以将第二输入电压调节到 第二电压调节器，第二电压调节器包括N型金属氧化物半导体（NMOS）。 在一方面，第一电压调节器耦合到第二电压调节器。