POWER MULTIPLEXER
    2.
    发明申请

    公开(公告)号:US20240429908A1

    公开(公告)日:2024-12-26

    申请号:US18340449

    申请日:2023-06-23

    Abstract: A system includes a comparator having a first input, a second input, and an output. The system also includes a first voltage divider having an input and an output, wherein the input of the first voltage divider is coupled to a first power rail, and the output of the first voltage divider is coupled to the first input of the comparator. The system also includes a second voltage divider having an input and an output, wherein the input of the second voltage divider is coupled to a second power rail, and the output of the second voltage divider is coupled to the second input of the comparator. The system further includes a power multiplexer coupled to the first power rail, the second power rail, and a first circuit, and a control circuit coupled to the output of the comparator and the power multiplexer.

    Power Level Comparator with Switching Input
    3.
    发明公开

    公开(公告)号:US20240355381A1

    公开(公告)日:2024-10-24

    申请号:US18306167

    申请日:2023-04-24

    CPC classification number: G11C11/413 H03K5/24 H10B10/18

    Abstract: An integrated circuit is disclosed that includes a power supply multiplexer for selecting between a first power supply voltage and a second power supply voltage to provide a selected power supply voltage to a memory. A controller includes a comparator stage having a comparator with switchable inputs so that the comparator stage may control a binary state of a first output signal responsive to whether the first power supply voltage is greater than the second power supply voltage plus a voltage offset of the comparator. Similarly, the comparator stage may control a binary state of a second output signal responsive to whether the first power supply voltage is greater than the second power supply voltage minus the voltage offset. The controller controls the selection by the power supply multiplexer responsive to the binary states of the first and second output signals.

    LOW RESISTANCE SWITCHES
    4.
    发明申请

    公开(公告)号:US20250040456A1

    公开(公告)日:2025-01-30

    申请号:US18715921

    申请日:2023-02-01

    Abstract: In certain aspects, a die includes fins extending in a first direction, gates formed over the fins, wherein the gates extend in a second direction that is perpendicular to the first direction, and source/drain contact layers formed over the fins, wherein the source/drain contact layers extend in the second direction, and the gates and the source/drain contact layers are interleaved. The die also includes a first gate metal layer, a second gate metal layer, wherein the source/drain contact layers are between the first gate metal layer and the second gate metal layer in the second direction, first gate vias electrically coupling the first gate metal layer to the gates, and second gate vias electrically coupling the second gate metal layer to the gates.

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