Address mapping in memory systems

    公开(公告)号:US11487676B2

    公开(公告)日:2022-11-01

    申请号:US16953230

    申请日:2020-11-19

    Applicant: Rambus Inc.

    Abstract: A memory system includes an address mapping circuit. The address mapping circuit receives an input memory address having a first set of address bits. The address mapping circuit applies a logic function to the input memory address to generate a mapped memory address. The logic function uses at least a subset of the first set of address bits in two separate operations that respectively determine two portions of the mapped memory address.

    Address mapping in memory systems

    公开(公告)号:US10853265B2

    公开(公告)日:2020-12-01

    申请号:US16134758

    申请日:2018-09-18

    Applicant: Rambus Inc.

    Abstract: A memory system includes an address mapping circuit. The address mapping circuit receives an input memory address having a first set of address bits. The address mapping circuit applies a logic function to the input memory address to generate a mapped memory address. The logic function uses at least a subset of the first set of address bits in two separate operations that respectively determine two portions of the mapped memory address.

    SELECTIVE REFRESH WITH SOFTWARE COMPONENTS
    3.
    发明申请
    SELECTIVE REFRESH WITH SOFTWARE COMPONENTS 审中-公开
    用软件组件进行选择性刷新

    公开(公告)号:US20140068172A1

    公开(公告)日:2014-03-06

    申请号:US13975873

    申请日:2013-08-26

    Applicant: Rambus Inc.

    CPC classification number: G11C11/406 G06F12/08 G06F12/1009 Y02D10/13

    Abstract: A method of refreshing a memory is disclosed. The method includes accessing from active memory an active memory map. The active memory map is generated by software and identifies addresses corresponding to the active memory and associated refresh criteria for the addresses. The refresh criteria are evaluated for a portion of the active memory, and an operation initiated to refresh a portion of the active memory is based on the refresh criteria.

    Abstract translation: 公开了一种刷新存储器的方法。 该方法包括从活动存储器访问活动存储器映射。 活动存储器映射由软件产生,并且识别与活动存储器相对应的地址和用于地址的相关联的刷新标准。 针对活动存储器的一部分评估刷新标准,并且基于刷新准则启动刷新活动存储器的一部分的操作。

    Selective refresh with software components

    公开(公告)号:US10157657B2

    公开(公告)日:2018-12-18

    申请号:US13975873

    申请日:2013-08-26

    Applicant: Rambus Inc.

    Abstract: A method of refreshing a memory is disclosed. The method includes accessing from active memory an active memory map. The active memory map is generated by software and identifies addresses corresponding to the active memory and associated refresh criteria for the addresses. The refresh criteria are evaluated for a portion of the active memory, and an operation initiated to refresh a portion of the active memory is based on the refresh criteria.

    LOW-POWER IMAGE CHANGE DETECTOR
    6.
    发明申请
    LOW-POWER IMAGE CHANGE DETECTOR 审中-公开
    低功率图像更改检测器

    公开(公告)号:US20150293018A1

    公开(公告)日:2015-10-15

    申请号:US14677878

    申请日:2015-04-02

    Applicant: RAMBUS INC.

    Abstract: A sensing device projects near-field spatial modulations onto a closely spaced photodetector array. Due to physical properties of the grating, the point-spread response distributes spatial modulations over a relatively large area on the array. The spatial modulations are captured by the array, and photographs and other image information can be extracted from the resultant data. An image-change detector incorporating such a sensing device uses very little power because only a small number of active pixels are required to cover a visual field.

    Abstract translation: 感测装置将近场空间调制投影到紧密间隔的光电检测器阵列上。 由于光栅的物理性质,点扩散响应在阵列上相对较大的区域上分布空间调制。 空间调制由阵列捕获,照片和其他图像信息可从结果数据中提取出来。 包含这种感测装置的图像变换检测器使用非常小的功率,因为​​仅需要少量的有源像素来覆盖视野。

    ADDRESS MAPPING IN MEMORY SYSTEMS

    公开(公告)号:US20210141737A1

    公开(公告)日:2021-05-13

    申请号:US16953230

    申请日:2020-11-19

    Applicant: Rambus Inc.

    Abstract: A memory system includes an address mapping circuit. The address mapping circuit receives an input memory address having a first set of address bits. The address mapping circuit applies a logic function to the input memory address to generate a mapped memory address. The logic function uses at least a subset of the first set of address bits in two separate operations that respectively determine two portions of the mapped memory address.

    ADDRESS MAPPING IN MEMORY SYSTEMS
    8.
    发明申请

    公开(公告)号:US20190121746A1

    公开(公告)日:2019-04-25

    申请号:US16134758

    申请日:2018-09-18

    Applicant: Rambus Inc.

    Abstract: A memory system includes an address mapping circuit. The address mapping circuit receives an input memory address having a first set of address bits. The address mapping circuit applies a logic function to the input memory address to generate a mapped memory address. The logic function uses at least a subset of the first set of address bits in two separate operations that respectively determine two portions of the mapped memory address.

    Address Mapping in Memory Systems
    10.
    发明申请
    Address Mapping in Memory Systems 审中-公开
    内存系统中的地址映射

    公开(公告)号:US20130097403A1

    公开(公告)日:2013-04-18

    申请号:US13652386

    申请日:2012-10-15

    Applicant: RAMBUS INC.

    CPC classification number: G06F12/1036 G06F12/0238 G06F2212/7211 Y02D10/13

    Abstract: A memory system includes an address mapping circuit. The address mapping circuit receives an input memory address having a first set of address bits. The address mapping circuit applies a logic function to the input memory address to generate a mapped memory address. The logic function uses at least a subset of the first set of address bits in two separate operations that respectively determine two portions of the mapped memory address.

    Abstract translation: 存储器系统包括地址映射电路。 地址映射电路接收具有第一组地址位的输入存储器地址。 地址映射电路将逻辑功能应用于输入存储器地址以产生映射的存储器地址。 逻辑功能在分别确定映射的存储器地址的两个部分的两个单独的操作中使用第一组地址位的至少一个子集。

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