公开(公告)号：US20180329185A1

公开(公告)日：2018-11-15

申请号：US15776386

申请日：2016-11-03

Applicant: Rambus Inc.

Inventor： Patrick R. Gill ,  David G. Stork ,  John Eric Lindstadt

IPC: G02B13/14 ,  G03H1/04 ,  H04N5/225 ,  G02B5/18

CPC classification number: G02B13/14 ,  G02B5/1871 ,  G03H1/0465 ,  G03H2001/045 ,  H04N5/2254

Abstract: An imaging system includes a phase grating overlying a two-dimensional array of pixels, which may be thermally sensitive pixels for use in infrared imaging. The phase grating comprises a two-dimensional array of identical subgratings that define a system of Cartesian coordinates. The subgrating and pixel arrays are sized and oriented such that the pixels are evenly distributed with respect to the row and column intersections of the subgratings. The location of each pixel thus maps to a unique location beneath a virtual archetypical subgrating. Portions of the phase grating extend beyond the edges of the pixels array to interference pattern in support of Fourier-domain imaging.

公开(公告)号：US20210350870A1

公开(公告)日：2021-11-11

申请号：US17269999

申请日：2019-08-30

Applicant: RAMBUS INC.

Inventor： Frederick A. Ware ,  John Eric Lindstadt

IPC: G11C29/42 ,  G11C29/44 ,  G11C29/18 ,  G11C29/12

Abstract: A memory controller generates error codes associates with write data and a write address and provides the error codes over a dedicated error detection code link to a memory device during a write operation. The memory device performs error detection, and in some cases correction, on the received write data and write address based on the error codes. If no uncorrectable errors are detected, the memory device furthermore stores the error codes in association with the write data. On a read operation, the memory device outputs the error codes over the error detection code link to the memory controller together with the read data. The memory controller performs error detection, and in some cases correction, on the received read data based on the error codes.

公开(公告)号：US20140293102A1

公开(公告)日：2014-10-02

申请号：US14355799

申请日：2012-11-08

Applicant: RAMBUS INC.

Inventor： Thomas Vogelsang ,  David Geoffrey Stork ,  John Eric Lindstadt ,  James E. Harris

IPC: H04N5/235

CPC classification number: H04N5/235 ,  H04N1/00769 ,  H04N5/2355 ,  H04N5/3355 ,  H04N5/3535 ,  H04N5/355 ,  H04N5/35536 ,  H04N5/3745

Abstract: Pixel circuits in an image sensor are sampled repetitively during an image frame period. At each sampling, a signal indicative of the photocharge integrated by a pixel circuit since last reset is compared to a threshold. If the integrated photocharge signal has not reached the threshold, the pixel circuit is permitted to continue integrating photocharge. If the integrated photocharge signal has reached the threshold, the pixel circuit is reset to remove integrated photocharge and photocharge integration for that pixel circuit is restarted. A corresponding pixel circuit value is recorded for the reset pixel circuit.

Abstract translation: 图像传感器中的像素电路在图像帧周期期间重复采样。 在每次采样时，将与上一次复位后的像素电路集成的光电荷的信号与阈值进行比较。 如果集成光电荷信号尚未达到阈值，则允许像素电路继续积分光电荷。 如果积分的光电荷信号已经达到阈值，则像素电路被复位以去除集成的光电荷并且该像素电路的光电荷积分被重新启动。 记录复位像素电路的对应像素电路值。