公开(公告)号：US20230197827A1

公开(公告)日：2023-06-22

申请号：US18052382

申请日：2022-11-03

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Zhichao LIN ,  Koji OGATA ,  Yukio TAKAHASHI ,  Tomohiro IMAI ,  Tetsuya YOSHIDA

IPC: H01L29/66 ,  H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L21/28 ,  H01L21/265

CPC classification number: H01L29/66348 ,  H01L29/7397 ,  H01L29/0638 ,  H01L29/0834 ,  H01L21/28185 ,  H01L21/28211 ,  H01L21/26513

Abstract: A gate electrode is formed inside a trench via a gate insulating film. The gate insulating film formed on a semiconductor substrate is removed. An insulating film is formed on the semiconductor substrate. A p-type base region is formed in the semiconductor substrate. An n-type emitter region is formed in the base region. Hydrogen annealing process is performed to the semiconductor substrate. A boundary between the base region and the emitter region is located at a position deeper than the insulating film formed between a side surface of the trench and the gate insulating film.