Abstract:
A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.
Abstract:
A parallel amplifier and a parallel amplifier power supply are disclosed. The parallel amplifier power supply provides a parallel amplifier power supply signal, which is adjustable on a communications slot-to-communications slot basis. During envelope tracking, the parallel amplifier regulates an envelope power supply voltage based on the parallel amplifier power supply signal.
Abstract:
A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.
Abstract:
A direct current (DC)-DC converter, which includes a parallel amplifier, a radio frequency (RF) trap, and a switching supply, is disclosed. The switching supply includes switching circuitry and a first inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The RF trap is coupled between the parallel amplifier output and a ground.
Abstract:
A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.
Abstract:
A parallel amplifier and a parallel amplifier power supply are disclosed. The parallel amplifier power supply provides a parallel amplifier power supply signal, which is adjustable on a communications slot-to-communications slot basis. During envelope tracking, the parallel amplifier regulates an envelope power supply voltage based on the parallel amplifier power supply signal.
Abstract:
A direct current (DC)-DC converter, which includes a parallel amplifier, a radio frequency (RF) trap, and a switching supply, is disclosed. The switching supply includes switching circuitry and a first inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The RF trap is coupled between the parallel amplifier output and a ground.
Abstract:
Circuitry, which includes a first switching transistor element having a first gate, a second switching transistor element having a second gate, a third switching transistor element having a third gate, and a fourth switching transistor element having a fourth gate, is disclosed. The first switching transistor element and the third switching transistor element are coupled in series between a first power source and a first downstream circuit. The second switching transistor element and the fourth switching transistor element are coupled in series between a second power source and the first downstream circuit. A voltage swing at the first gate and a voltage swing at the second gate are both about equal to a first voltage magnitude. A voltage swing at the third gate and a voltage swing at the fourth gate are both about equal to a second voltage magnitude.
Abstract:
A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.
Abstract:
A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.