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    Method of manufacturing a CMOS device including molecular storage elements in a via level
    4.
    发明授权
    Method of manufacturing a CMOS device including molecular storage elements in a via level 有权
    制造包括通孔级分子存储元件的CMOS器件的方法

    公开(公告)号：US08445378B2

    公开(公告)日：2013-05-21

    申请号：US12839455

    申请日：2010-07-20

    申请人： Stephan Kronholz ,  Markus Lenski ,  Ralf Richter

    发明人： Stephan Kronholz ,  Markus Lenski ,  Ralf Richter

    IPC分类号： H01L21/768

    CPC分类号： H01L27/281 ,  G11C13/0014 ,  G11C13/0016 ,  H01L51/0003 ,  H01L51/0591

    摘要： Memory cells in integrated circuit devices may be formed on the basis of functional molecules which may be positioned within via openings on the basis of appropriate patterning techniques, which may also be used for forming semiconductor-based integrated circuits. Consequently, memory cells may be formed on a “molecular” level without requiring extremely sophisticated patterning regimes, such as electron beam lithography and the like.

    摘要翻译： 可以基于功能分子形成集成电路器件中的存储器单元，功能分子可以基于合适的图案化技术而定位在通孔开口内，该技术也可用于形成基于半导体的集成电路。 因此，可以在“分子”水平上形成记忆单元，而不需要非常复杂的图案化方案，例如电子束光刻等。

    Cap removal in a high-k metal gate electrode structure by using a sacrificial fill material
    6.
    发明授权
    Cap removal in a high-k metal gate electrode structure by using a sacrificial fill material 有权
    通过使用牺牲填充材料在高k金属栅电极结构中去除帽

    公开(公告)号：US08329526B2

    公开(公告)日：2012-12-11

    申请号：US12905655

    申请日：2010-10-15

    申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

    发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

    IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238

    CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

    摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

    摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

    CMOS DEVICE INCLUDING MOLECULAR STORAGE ELEMENTS IN A VIA LEVEL
    7.
    发明申请
    CMOS DEVICE INCLUDING MOLECULAR STORAGE ELEMENTS IN A VIA LEVEL 有权
    包含分子量储存元件的CMOS器件在威盛级别

    公开(公告)号：US20110024912A1

    公开(公告)日：2011-02-03

    申请号：US12839455

    申请日：2010-07-20

    申请人： Stephan Kronholz ,  Markus Lenski ,  Ralf Richter

    发明人： Stephan Kronholz ,  Markus Lenski ,  Ralf Richter

    IPC分类号： H01L23/532 ,  H01L21/768

    CPC分类号： H01L27/281 ,  G11C13/0014 ,  G11C13/0016 ,  H01L51/0003 ,  H01L51/0591

    摘要： Memory cells in integrated circuit devices may be formed on the basis of functional molecules which may be positioned within via openings on the basis of appropriate patterning techniques, which may also be used for forming semiconductor-based integrated circuits. Consequently, memory cells may be formed on a “molecular” level without requiring extremely sophisticated patterning regimes, such as electron beam lithography and the like.

    摘要翻译： 可以基于功能分子形成集成电路器件中的存储器单元，功能分子可以基于合适的图案化技术而定位在通孔开口内，该技术也可用于形成基于半导体的集成电路。 因此，可以在“分子”水平上形成记忆单元，而不需要非常复杂的图案化方案，例如电子束光刻等。

    Using high-k dielectrics as highly selective etch stop materials in semiconductor devices
    8.
    发明授权
    Using high-k dielectrics as highly selective etch stop materials in semiconductor devices 有权
    使用高k电介质作为半导体器件中的高选择性蚀刻停止材料

    公开(公告)号：US08198166B2

    公开(公告)日：2012-06-12

    申请号：US12844135

    申请日：2010-07-27

    申请人： Thorsten Kammler ,  Ralf Richter ,  Markus Lenski ,  Gunter Grasshoff

    发明人： Thorsten Kammler ,  Ralf Richter ,  Markus Lenski ,  Gunter Grasshoff

    IPC分类号： H01L21/00

    CPC分类号： H01L29/4983 ,  H01L21/823807 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7843

    摘要： A spacer structure in sophisticated semiconductor devices is formed on the basis of a high-k dielectric material, which provides superior etch resistivity compared to conventionally used silicon dioxide liners. Consequently, a reduced thickness of the etch stop material may nevertheless provide superior etch resistivity, thereby reducing negative effects, such as dopant loss in the drain and source extension regions, creating a pronounced surface topography and the like, as are typically associated with conventional spacer material systems.

    摘要翻译： 在高k电介质材料的基础上形成复杂半导体器件中的间隔结构，其与传统使用的二氧化硅衬垫相比提供了优异的蚀刻电阻率。 因此，蚀刻停止材料的厚度减小可以提供优异的蚀刻电阻率，从而减少负面影响，例如漏极和源极延伸区域中的掺杂剂损失，产生显着的表面形貌等，如通常与常规间隔物相关联 材料系统

    CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A SACRIFICIAL FILL MATERIAL
    9.
    发明申请
    CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A SACRIFICIAL FILL MATERIAL 有权
    通过使用真空填充材料在高K金属电极结构中去除CAP

    公开(公告)号：US20110129980A1

    公开(公告)日：2011-06-02

    申请号：US12905655

    申请日：2010-10-15

    申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

    发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

    IPC分类号： H01L21/336

    CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

    摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

    摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

    USING HIGH-K DIELECTRICS AS HIGHLY SELECTIVE ETCH STOP MATERIALS IN SEMICONDUCTOR DEVICES
    10.
    发明申请
    USING HIGH-K DIELECTRICS AS HIGHLY SELECTIVE ETCH STOP MATERIALS IN SEMICONDUCTOR DEVICES 有权
    使用高K电介质作为半导体器件中的高选择性止蚀材料

    公开(公告)号：US20110024805A1

    公开(公告)日：2011-02-03

    申请号：US12844135

    申请日：2010-07-27

    申请人： Thorsten Kammler ,  Ralf Richter ,  Markus Lenski ,  Gunter Grasshoff

    发明人： Thorsten Kammler ,  Ralf Richter ,  Markus Lenski ,  Gunter Grasshoff

    IPC分类号： H01L29/40 ,  H01L21/3065 ,  H01L21/266

    CPC分类号： H01L29/4983 ,  H01L21/823807 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7843

    摘要： A spacer structure in sophisticated semiconductor devices is formed on the basis of a high-k dielectric material, which provides superior etch resistivity compared to conventionally used silicon dioxide liners. Consequently, a reduced thickness of the etch stop material may nevertheless provide superior etch resistivity, thereby reducing negative effects, such as dopant loss in the drain and source extension regions, creating a pronounced surface topography and the like, as are typically associated with conventional spacer material systems.

    摘要翻译： 在高k电介质材料的基础上形成复杂半导体器件中的间隔结构，其与传统使用的二氧化硅衬垫相比提供了优异的蚀刻电阻率。 因此，蚀刻停止材料的厚度减小可以提供优异的蚀刻电阻率，从而减少负面影响，例如漏极和源极延伸区域中的掺杂剂损失，产生显着的表面形貌等，如通常与常规间隔物相关联 材料系统