公开(公告)号：US20240012710A1

公开(公告)日：2024-01-11

申请号：US18213828

申请日：2023-06-24

Applicant: Rambus Inc.

Inventor： Evan Lawrence ERICKSON ,  John Eric LINSTADT

IPC: G06F11/10

CPC classification number: G06F11/10

Abstract: When writing a block (e.g., cache line) of data to a memory, error detection and correction (EDC) information (check) symbols are calculated. The block of data, a first portion of the check symbols, and metadata are all written concurrently at a first address. The remaining portion of the check symbols are written at a second, different from the first, address. When reading the block of data, a first read command accesses the block of data, the first portion of the check symbols, and the metadata from the first address. Only the first portion of the check symbols is used to determine a first number of errors (if any) in the accessed data. If the first number of errors meets a threshold number of errors, a second read command is issued to access the second portion of the check symbols.

公开(公告)号：US20230359554A1

公开(公告)日：2023-11-09

申请号：US18140441

申请日：2023-04-27

Applicant: Rambus Inc.

Inventor： Evan Lawrence ERICKSON ,  Christopher HAYWOOD

IPC: G06F12/02 ,  G06F12/0891

CPC classification number: G06F12/0292 ,  G06F12/0891 ,  G06F2212/401

Abstract: A buffer/interface device of a memory node reads a block of data (e.g., page). As each unit of data (e.g., cache line sized) of the block is read, it is compared against one or more predefined patterns (e.g., all 0's, all 1's, etc.). If the block (page) is only storing one of the predefined patterns, a flag in the page table entry for the block is set to indicate the block is only storing one of the predefined patterns. The physical memory the block was occupying may then be deallocated so other data may be stored using those physical memory addresses.

公开(公告)号：US20240036726A1

公开(公告)日：2024-02-01

申请号：US18219842

申请日：2023-07-10

Applicant: Rambus Inc.

Inventor： Evan Lawrence ERICKSON ,  Christopher HAYWOOD

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/0631 ,  G06F3/064 ,  G06F3/0673

Abstract: A buffer/interface device of a memory node may read and compress fixed size blocks of data (e.g., pages). The size of each of the resulting compressed blocks of data is dependent on the data patterns in the original blocks of data. Fixed sized blocks of data are divided into fixed size sub-blocks (a.k.a., slots) for storing the resulting compressed blocks of data at with sub-block granularity. Pointers to the start of compressed pages are maintained at the final level of the memory node page tables in order to allow access to compressed pages. Upon receiving an access to a location within a compressed page, only the slots containing the compressed page need to be read and decompressed. The memory node page table entries may also include a content indicator (e.g., flag) that indicates whether any page within the block of memory associated with that page table entry is compressed.

公开(公告)号：US20220237126A1

公开(公告)日：2022-07-28

申请号：US17576398

申请日：2022-01-14

Applicant: Rambus Inc.

Inventor： Steven C. WOO ,  Christopher HAYWOOD ,  Evan Lawrence ERICKSON

IPC: G06F12/1009 ,  G06F12/02 ,  G06F12/0882 ,  G06F9/455

Abstract: The creation, maintenance, and accessing of page tables is done by a virtual machine monitor running on a computing system rather than the guest operating systems. This allows page table walks to be completed in fewer memory accesses when compared to the guest operating system's maintenance of the page tables. In addition, the virtual machine monitor may utilize additional resources to offload page table access and maintenance functions from the CPU to another device, such as a page table management device or page table management node. Offloading some or all page table access and maintenance functions to a specialized device or node enables the CPU to perform other tasks during page table walks and/or other page table maintenance functions.

公开(公告)号：US20210390066A1

公开(公告)日：2021-12-16

申请号：US17333420

申请日：2021-05-28

Applicant: Rambus Inc.

Inventor： Christopher HAYWOOD ,  Evan Lawrence ERICKSON

IPC: G06F13/16 ,  G06F12/02

Abstract: A multi-path fabric interconnected system with many nodes and many communication paths from a given source node to a given destination node. A memory allocation device on an originating node (local node) requests an allocation of memory from a remote node (i.e., requests a remote allocation). The memory allocation device on the local node selects the remote node based on one or more performance indicators. The local memory allocation device may select the remote node to provide a remote allocation of memory based on one or more of: latency, availability, multi-path bandwidth, data access patterns (both local and remote), fabric congestion, allowed bandwidth limits, maximum latency limits, and, available memory on remote node.

公开(公告)号：US20210389887A1

公开(公告)日：2021-12-16

申请号：US17333409

申请日：2021-05-28

Applicant: Rambus Inc.

Inventor： Evan Lawrence ERICKSON ,  Christopher HAYWOOD

IPC: G06F3/06

Abstract: A memory allocation device on an originating node requests an allocation of memory from a remote node. In response, the memory allocation device on the remote node returns a global system address that can be used to access the remote allocation from the originating node. Concurrent with the memory allocation device assigning (associating) a local (to its node) physical address to be used to access the remote allocation, the remote node allocates local physical memory to fulfill the remote allocation request. In this manner, the remote node has already completed the overhead operations associated with the remote allocation requested by the time the remote allocation is accessed by the originating node.