Ultra high frequency ring oscillator with voltage controlled frequency capabilities

    公开(公告)号:US20060103478A1

    公开(公告)日:2006-05-18

    申请号:US10988463

    申请日:2004-11-12

    IPC分类号: H03K3/03

    摘要: A pseudo Set/Reset latch circuit is configured with modified NOR or NAND gates wherein one of the series pull-up devices or pull-down devices is removed. A minimum of three pseudo Set/Reset latches may be coupled as a ring oscillator generating an output and a non-skewed complementary output. Additionally, feed-forward inverting stages may be coupled in parallel with inverting paths in the ring oscillator primary path to further increase the frequency range of the ring oscillator. The pseudo Set/Reset latch circuits and the feed-forward inverting stages may be configured with voltage controlled devices that alter the delay of the stages as a means for varying the frequency of the ring oscillator either by varying the current drive of the circuitry driving the output of the latch stages or by varying the conductance of devices coupling between the latch stages. Feedforward inverting stages may comprise pseudo latches or inverter gates.

    Digital duty cycle corrector
    2.
    发明申请
    Digital duty cycle corrector 失效
    数字占空比校正器

    公开(公告)号:US20060103441A1

    公开(公告)日:2006-05-18

    申请号:US10988454

    申请日:2004-11-12

    IPC分类号: H03K3/017

    CPC分类号: H03K5/1565

    摘要: A circuit and method of correcting the duty cycle of digital signals is disclosed. The duty cycle of an input digital signal is measured and compared to a desired duty cycle. The leading edge of the input digital signal is passed to an output. The circuit and method adjust the falling edges at the output to achieve the desired duty cycle. The falling edges occur in response to rising edges of a delayed version of the input digital signal.

    摘要翻译: 公开了一种校正数字信号占空比的电路和方法。 测量输入数字信号的占空比并将其与期望的占空比进行比较。 输入数字信号的前沿被传递到输出。 该电路和方法调节输出端的下降沿以达到所需的占空比。 响应于延迟版本的输入数字信号的上升沿发生下降沿。

    Method and apparatus for fail-safe and restartable system clock generation
    3.
    发明申请
    Method and apparatus for fail-safe and restartable system clock generation 失效
    用于故障安全和可重启系统时钟生成的方法和装置

    公开(公告)号:US20070096782A1

    公开(公告)日:2007-05-03

    申请号:US11260563

    申请日:2005-10-27

    IPC分类号: H03L7/06

    CPC分类号: H03L7/18 G06F1/04

    摘要: A method and apparatus for fail-safe and restartable system clock generation provides recovery from failures due to incorrect clock generator settings or from marginal clock distribution components. Clock failure is detected at a point along the clock distribution path between the output of the clock generator and the downstream circuits. If a clock failure is detected, a second clock, which may be the clock generator reference clock, is used to operate the downstream circuits. The clock generator, which may be a phase-lock loop, is then restarted, either with a predetermined loop filter voltage at which downstream circuits are guaranteed to operate, or with a divider setting on the output of the clock generator that reduces the frequency so that downstream circuits are guaranteed to operate. Parameters of the clock generator can thereby be reset and operating conditions determined before restoring the output of the clock generator to the downstream circuits.

    摘要翻译: 用于故障安全和可重新启动的系统时钟生成的方法和装置提供了由于错误的时钟发生器设置或边缘时钟分配组件导致的故障的恢复。 在时钟发生器的输出与下游电路之间的时钟分配路径的某一点检测到时钟故障。 如果检测到时钟故障,则可以使用可能是时钟发生器参考时钟的第二时钟来操作下游电路。 时钟发生器可以是锁相环,然后重新启动下游电路被保证工作的预定环路滤波器电压,或者在时钟发生器的输出端上分频器设置,从而降低频率 确保下游电路工作。 因此,时钟发生器的参数可以在将时钟发生器的输出恢复到下行电路之前被确定并且确定操作条件。

    Packaging system, apparatus, and method with extruded force absorbing truss members
    5.
    发明申请
    Packaging system, apparatus, and method with extruded force absorbing truss members 审中-公开
    具有挤压力吸收桁架构件的包装系统,装置和方法

    公开(公告)号:US20050204964A1

    公开(公告)日:2005-09-22

    申请号:US11045856

    申请日:2005-01-28

    摘要: A system, apparatus, and method for use in the packing of an appliance containing a pallet, corner members, and truss members are provided. The pallet comprises first and second support members, a connecting cross member, and at least one truss member for providing peripheral and oblique force absorption, wherein the cross member is substantially perpendicular to the first and second support members. The first and second support members include attachment holes, wherein the attachment holes allow for the attachment of the pallet to the appliance. The first and second support members and the cross member are manufactured from a synthetic substance and are substantially hollow. The system further comprises an available plurality of articulable corner support members, corner junction end caps with tenons, closed cell design elements, and standoffs used to protect, support, separate and/or stabilize the appliance in a container.

    摘要翻译: 提供了一种用于包装托盘,角部件和桁架构件的器具的系统,装置和方法。 托盘包括第一和第二支撑构件,连接横梁和至少一个用于提供周向和倾斜的力吸收的桁架构件,其中横向构件基本上垂直于第一和第二支撑构件。 第一和第二支撑构件包括附接孔,其中附接孔允许托盘附接到器具。 第一和第二支撑构件和横向构件由合成物质制成并且基本上是中空的。 该系统还包括可用的多个可铰接角支撑构件,具有榫头的角连接端盖,闭孔设计元件和用于保护,支撑,分离和/或稳定容器中的器具的支座。

    Voltage controlled oscillator with selectable frequency ranges

    公开(公告)号:US20050110578A1

    公开(公告)日:2005-05-26

    申请号:US10718062

    申请日:2003-11-20

    IPC分类号: H03K3/03 H03L7/099 H03L7/00

    摘要: A VCO is configured using a ring oscillator with voltage controlled feedforward inverting stages coupled around the inverting stages making up the basic ring oscillator to enable the frequency of the ring oscillator to be voltage controlled. A latch and multiplexer is used to select between two or more outputs within the ring oscillator to change the basic frequency range of the VCO glitch free. To achieve a wide range VCO, additional stages are added to the basic ring oscillator. When the number of stages is an odd number greater than seven, then the voltage controlled feedforward inverting stages feedback to the outputs of the first and second inverting stages of the ring oscillator. Two additional multiplexers are added to select which feedforward inverting stage is coupled to the first and second inverting stage. This allows a wide range interleaved VCO that switches between frequency ranges glitch free.

    Packaging system
    7.
    发明授权
    Packaging system 失效
    包装系统

    公开(公告)号:US07455017B2

    公开(公告)日:2008-11-25

    申请号:US10637220

    申请日:2003-08-08

    IPC分类号: B65D19/00

    摘要: A system for use in the packing of an appliance containing the pallet and corner members is provided. The pallet comprises first and second support members and a connecting cross member, wherein the cross member is substantially perpendicular to the first and second support members. The first and second support members include attachment holes, wherein the attachment holes allow for the attachment of the pallet to the appliance. The first and second support members and the cross member are manufactured from a synthetic substance and are substantially hollow. The system further comprises corner pieces and standoffs used to stabilize and protect the appliance in a container.

    摘要翻译: 提供一种用于包装托盘和角部件的器具的包装系统。 托盘包括第一和第二支撑构件和连接横向构件,其中横向构件基本上垂直于第一和第二支撑构件。 第一和第二支撑构件包括附接孔,其中附接孔允许托盘附接到器具。 第一和第二支撑构件和横向构件由合成物质制成并且基本上是中空的。 该系统还包括用于稳定和保护容器中的器具的拐角件和支座。

    Skewed inverter delay line for use in measuring critical paths in an integrated circuit
    8.
    发明申请
    Skewed inverter delay line for use in measuring critical paths in an integrated circuit 失效
    用于测量集成电路中关键路径的偏转逆变器延迟线

    公开(公告)号:US20060200716A1

    公开(公告)日:2006-09-07

    申请号:US11071554

    申请日:2005-03-03

    IPC分类号: G01R31/28

    CPC分类号: G01R31/31725 G01R31/3016

    摘要: An integrated circuit includes a testable delay path. A transition of a delay path input signal causes a subsequent transition of a delay path output signal. A pulse generator receives the delay path input and output signals and produces a pulse signal having a pulse width indicative of the delay between the delay path input and output signal transitions. A delay line receives the pulse signal from the pulse generator. The delay line generates information indicative of the pulse signal pulse width. The delay line may include multiple stages in series where each stage reduces the pulse width of the pulse signal. The delay line may include a high skew inverter having PMOS and NMOS transistors having significantly different gains. The pulse generator is configured to produce a positive going pulse signal regardless of whether the delay path is inverting or non-inverting.

    摘要翻译: 集成电路包括可测试延迟路径。 延迟路径输入信号的转变导致延迟路径输出信号的随后转变。 脉冲发生器接收延迟路径输入和输出信号并产生具有指示延迟路径输入和输出信号转换之间的延迟的脉冲宽度的脉冲信号。 延迟线从脉冲发生器接收脉冲信号。 延迟线产生指示脉冲信号脉冲宽度的信息。 延迟线可以包括串联的多个级,其中每级降低脉冲信号的脉冲宽度。 延迟线可以包括具有PMOS和NMOS晶体管的具有显着不同增益的高偏斜反相器。 脉冲发生器被配置为产生正向脉冲信号,而不管延迟路径是反相还是反相。

    Method and apparatus for supporting an article
    9.
    发明申请
    Method and apparatus for supporting an article 失效
    用于支撑制品的方法和装置

    公开(公告)号:US20050178932A1

    公开(公告)日:2005-08-18

    申请号:US10973216

    申请日:2004-10-22

    申请人: Gary Carpenter

    发明人: Gary Carpenter

    摘要: A method and apparatus for the support of an article provided as a single article of manufacture adapted to rest in the trunk or cargo area of a vehicle or any other flat surface. The single article of manufacture is able to be separated into at least two pieces that interlock to form the support that cradles the article at an angle such that the base of the article maintains contact with the floor of the vehicle while the top of the article is held in an upright position.

    摘要翻译: 一种用于支撑物品的方法和装置,其被提供为适于搁置在车辆或任何其它平坦表面的行李箱或货物区域中的单个制造制品。 单个制造制品能够被分成至少两个互锁件以形成以一定角度托起物品的支撑件,使得制品的基部保持与车辆的地板接触,同时制品的顶部是 保持直立的位置。

    Aircraft loading apparatus
    10.
    发明授权
    Aircraft loading apparatus 失效
    飞机装载装置

    公开(公告)号:US4586684A

    公开(公告)日:1986-05-06

    申请号:US528488

    申请日:1983-09-01

    IPC分类号: B64C1/22 B64D9/00

    CPC分类号: B64C1/22

    摘要: An on-board aircraft loading apparatus including an improved cargo platform and a simplified suspension frame therefor and improved hoist means for lifting and lowering the cargo platform with respect to the suspension frame.

    摘要翻译: 一种车载飞行器装载装置,包括改进的货物平台和用于其的简化悬架,以及用于相对于悬挂框架升降货物平台的改进的提升装置。