摘要:
A method for a mobile terminal accessing wireless access points and a wireless access point are disclosed. The method includes: after acquiring an access request of a mobile station, when determining that its load exceeds a preset first load upper limit, according to acquired connection information of other wireless access points, a first wireless access point sends a load balance request to all the other wireless access points; a wireless access point receiving the request sends a load balance feedback message to the first wireless access point, carrying its load and connection authentication information required; the first wireless access point selects a load balance feedback message carrying a minimum load from all received messages, and then sends the connection authentication information carried in the selected message to the mobile station; and the mobile station initiates an access flow to a corresponding wireless access point according to the received information.
摘要:
A method for a mobile terminal accessing wireless access points and a wireless access point are disclosed. The method includes: after acquiring an access request of a mobile station, when determining that its load exceeds a preset first load upper limit, according to acquired connection information of other wireless access points, a first wireless access point sends a load balance request to all the other wireless access points; a wireless access point receiving the request sends a load balance feedback message to the first wireless access point, carrying its load and connection authentication information required; the first wireless access point selects a load balance feedback message carrying a minimum load from all received messages, and then sends the connection authentication information carried in the selected message to the mobile station; and the mobile station initiates an access flow to a corresponding wireless access point according to the received information.
摘要:
Techniques designing an electronic circuit system including multiple transistors and passive components are presented. According to one aspect of the techniques, some or all of the transistors and passive components are systematically adjusted to minimize artifacts resulting from system-level interactions among these functional building blocks. The adjustment is based on a ratio of Electrically Equivalent Channel Geometry (EECG) of each of the adjusted the transistors and passive components.
摘要:
A method of designing a system of electronic circuit is presented. With this method the circuit parameters of the components of the individual functional building blocks of the system are systematically adjusted to minimize the deteriorating effect resulting from system-level interactions among these functional building blocks. In one embodiment, the method is applied to a CMOS IC that is a Divide-by-16 divider where the functional building blocks are four Dividing by-2 dividers. The resulting improvement of output signal ripple from each devided stage is graphically presented. In another embodyment, the method is applied to another CMOS IC that is a Bang Bang Phase Detector where the functional building blocks are three Master Slave D-Type Flip Flops. The resulting improvement of output signal ripple is also graphically presented.
摘要:
A fundamental building block of 2-level series-gated CML-based CMOS circuit which includes a number of inductive components for an electronic circuit system is disclosed that is capable of driving a significant level of external capacitive load at a high input clock frequency while providing a high level of output signal fidelity for optical data communication. The inductive components can be implemented as either separate inductors or as differentially coupled pairs forming a corresponding transformer element. The value of any particular inductive component is first selected to approximately resonate, at the desired output signal frequency, with its associated equivalent node capacitance but further adjusted to a final value that results in a minimum output waveform distortion for the particular application. Two exemplary cases of application, a Divide-by-2 counter and a Master Slave D-type Flip Flop are presented with associated time domain output waveforms.