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公开(公告)号:US20220255549A1
公开(公告)日:2022-08-11
申请号:US17646767
申请日:2022-01-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gurnrack Moon , Younggwan Kim , Hojin Kim
IPC: H03K19/017 , H03K19/17784 , H03K19/17736 , H03K19/17728
Abstract: The present disclosure provides an integrated circuit and a computing system. The integrated circuit and a computing system includes a dynamic voltage and frequency scaling (DVFS) operation and a method of operating the integrated circuit. The integrated circuit includes a plurality of sub blocks and a dynamic voltage and frequency scaling (DVFS) controller. The DVFS controller is configured to output a workload of the plurality of sub blocks, determine a first frequency corresponding to the workload, determine a first voltage corresponding to the first frequency, and provide a second frequency among at least one frequency corresponding to the first voltage to the plurality of sub blocks.
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公开(公告)号:US12021523B2
公开(公告)日:2024-06-25
申请号:US17646767
申请日:2022-01-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gurnrack Moon , Younggwan Kim , Hojin Kim
IPC: H03K19/017 , G06F1/08 , G06F1/324 , G06F1/3296 , G06F11/30 , H03K19/17728 , H03K19/17736 , H03K19/17784
CPC classification number: H03K19/01728 , G06F1/08 , G06F1/324 , H03K19/17728 , H03K19/1774 , H03K19/17784
Abstract: The present disclosure provides an integrated circuit and a computing system. The integrated circuit and a computing system includes a dynamic voltage and frequency scaling (DVFS) operation and a method of operating the integrated circuit. The integrated circuit includes a plurality of sub blocks and a dynamic voltage and frequency scaling (DVFS) controller. The DVFS controller is configured to output a workload of the plurality of sub blocks, determine a first frequency corresponding to the workload, determine a first voltage corresponding to the first frequency, and provide a second frequency among at least one frequency corresponding to the first voltage to the plurality of sub blocks.
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公开(公告)号:US20220308920A1
公开(公告)日:2022-09-29
申请号:US17529854
申请日:2021-11-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seyeong Byeon , Jonglae Park , Hojin Kim , Gurnrack Moon , Daeyeong Lee , Youngtae Lee
IPC: G06F9/48
Abstract: A task scheduling method for a central processing unit (CPU) including a plurality of cores includes receiving a task processing request, obtaining first feedback data for the plurality of cores, obtaining second feedback data for an external intellectual property (IP) block outside the CPU, and assigning a task to at least one of the plurality of cores based on the first feedback data and the second feedback data.
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