Abstract:
A memory system is provided and includes memory chips in each of which a first state output pin is arranged and a memory controller in which a first state input pin connected to a first channel including first ways respectively connected to the first state output pins arranged in the memory chips is arranged. The memory controller checks a first internal state of each of the memory chips, based on one or more of a chip enable signal and a CE reduction command of the memory chips, and a second signal received through the first state input pin as a result of an AND operation of first signals output through the first state output pins, during a state check interval for checking respective states of the memory chips.
Abstract:
A nonvolatile memory device includes a data generating unit for generating a first reference value randomly or pseudo-randomly according to a first program request to program data in a memory cell, a seed selecting unit for selecting at least one of a plurality of seeds using the first reference value, and a randomizer for generating randomized data by using the selected seed. The data generating unit regenerates the first reference value as a second reference value different from the first reference value when a second program request is made, and the seed selecting unit selects another seed using the second reference value.