TWO-DIMENSIONAL ARRAY-BASED NEUROMORPHIC PROCESSOR AND IMPLEMENTING METHOD

    公开(公告)号:US20230214637A1

    公开(公告)日:2023-07-06

    申请号:US18120137

    申请日:2023-03-10

    CPC classification number: G06N3/063 G06F7/523 G06F7/50 G06F2207/4824

    Abstract: A 2D array-based neuromorphic processor includes: axon circuits each being configured to receive a first input corresponding to one bit from among bits indicating n-bit activation; first direction lines extending in a first direction from the axon circuits; second direction lines intersecting the first direction lines; synapse circuits disposed at intersections of the first direction lines and the second direction lines, and each being configured to store a second input corresponding to one bit from among bits indicating an m-bit weight and to output operation values of the first input and the second input; and neuron circuits connected to the first or second direction lines, each of the neuron circuits being configured to receive an operation value output from at least one of the synapse circuits, based on time information assigned individually to the synapse circuits, and to perform an arithmetic operation by using the operation values.

    DISPLAY PANEL AND DISPLAY APPARATUS INCLUDING SAME

    公开(公告)号:US20210302782A1

    公开(公告)日:2021-09-30

    申请号:US17212490

    申请日:2021-03-25

    Abstract: A display panel and a display apparatus are provided. The display panel may include a first glass substrate; a second glass substrate provided in front of the first glass substrate in a first direction; and a color filter layer provided between the second glass substrate and the first glass substrate in the first direction. The color filter layer may include a plurality of color filters and a black matrix surrounding the plurality of color filters. A side edge of the black matrix may extend beyond a side edge of the first glass substrate in a second direction that is orthogonal to the first direction. The display apparatus may include a backlight unit and the display panel.

    TWO-DIMENSIONAL ARRAY-BASED NEUROMORPHIC PROCESSOR AND IMPLEMENTING METHOD

    公开(公告)号:US20200074284A1

    公开(公告)日:2020-03-05

    申请号:US16274547

    申请日:2019-02-13

    Abstract: A 2D array-based neuromorphic processor includes: axon circuits each being configured to receive a first input corresponding to one bit from among bits indicating n-bit activation; first direction lines extending in a first direction from the axon circuits; second direction lines intersecting the first direction lines; synapse circuits disposed at intersections of the first direction lines and the second direction lines, and each being configured to store a second input corresponding to one bit from among bits indicating an m-bit weight and to output operation values of the first input and the second input; and neuron circuits connected to the second direction lines, each of the neuron circuits being configured to receive an operation value output from at least one of the synapse circuits, based on time information assigned individually to the synapse circuits, and to perform a multi-bit operation by using the operation values and the time information.

    NEURAL NETWORK APPARATUS AND METHOD OF PROCESSING VARIABLE-RESOLUTION OPERATION BY THE SAME

    公开(公告)号:US20230076169A1

    公开(公告)日:2023-03-09

    申请号:US17987369

    申请日:2022-11-15

    Abstract: A neural network apparatus that is configured to process an operation includes neural network circuitry configured to receive a first input of an n-bit activation, store a second input of an m-bit weight, perform a determination whether to perform an operation on an ith bit of the first input and a jth bit of the second input, output an operation value of an operation performed on the ith bit of the first input and the jth bit of the second input based on the determination, and produce an operation value of the operation based on the determination.

    DISPLAY APPARATUS
    9.
    发明申请

    公开(公告)号:US20220397794A1

    公开(公告)日:2022-12-15

    申请号:US17716722

    申请日:2022-04-08

    Abstract: A display apparatus includes: a display panel; a light source module provided behind the display panel, the light source module including a board and a light source provided on a rear surface of the board; a rear chassis covering a rear surface of the light source module; and a supporter extending between the board and the rear chassis, the supporter being electrically conductive.

    NEURAL NETWORK APPARATUS AND METHOD OF PROCESSING VARIABLE-RESOLUTION OPERATION BY THE SAME

    公开(公告)号:US20200242454A1

    公开(公告)日:2020-07-30

    申请号:US16557182

    申请日:2019-08-30

    Abstract: A neural network apparatus that is configured to process an operation includes neural network circuitry configured to receive a first input of an n-bit activation, store a second input of an m-bit weight, perform a determination whether to perform an operation on an ith bit of the first input and a jth bit of the second input, output an operation value of an operation performed on the ith bit of the first input and the jth bit of the second input based on the determination, and produce an operation value of the operation based on the determination.

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