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公开(公告)号:US09698654B2
公开(公告)日:2017-07-04
申请号:US14036176
申请日:2013-09-25
Applicant: Silicon Laboratories Inc.
Inventor: Paulo Santos , Tufan Karalar , Michael J. Mills , Ross Sabolcik , Rudye McGlothlin , Michael L. Duffy , András Vince Horvath
CPC classification number: H02K11/20 , H02H7/0822 , H02H9/001 , H02P27/06 , H02P29/0241
Abstract: An apparatus for controlling a high-power drive device external to a package of a motor drive circuit includes a motor drive circuit. The motor drive circuit includes a driver to control the high-power drive device based on a first reference voltage, a second reference voltage, and a control signal based on a received control signal. A fault circuit generates a failure indicator based on a voltage across terminals of the high-power drive device. A fault condition is based on the failure indicator. A first terminal coupled to the driver charges a node of the high-power drive device over a first length of time in response to an absence of the fault condition and a first level of the control signal. A second terminal coupled to the driver discharges the node over a second length of time different from the first length of time.
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公开(公告)号:US20150085403A1
公开(公告)日:2015-03-26
申请号:US14036176
申请日:2013-09-25
Applicant: Silicon Laboratories Inc.
Inventor: Paulo Santos , Tufan Karalar , Michael J. Mills , Ross Sabolcik , Rudye McGlothlin , Michael L. Duffy , András Vince Horvath
CPC classification number: H02K11/20 , H02H7/0822 , H02H9/001 , H02P27/06 , H02P29/0241
Abstract: An apparatus for controlling a high-power drive device external to a package of a motor drive circuit includes a motor drive circuit. The motor drive circuit includes a driver to control the high-power drive device based on a first reference voltage, a second reference voltage, and a control signal based on a received control signal. A fault circuit generates a failure indicator based on a voltage across terminals of the high-power drive device. A fault condition is based on the failure indicator. A first terminal coupled to the driver charges a node of the high-power drive device over a first length of time in response to an absence of the fault condition and a first level of the control signal. A second terminal coupled to the driver discharges the node over a second length of time different from the first length of time.
Abstract translation: 用于控制电动机驱动电路的封装外部的大功率驱动装置的装置包括电动机驱动电路。 马达驱动电路包括基于第一参考电压,第二参考电压和基于所接收的控制信号的控制信号来控制高功率驱动装置的驱动器。 故障电路基于大功率驱动装置的端子上的电压产生故障指示器。 故障情况基于故障指示器。 耦合到驱动器的第一端子响应于不存在故障条件和控制信号的第一电平,在第一时间长度上对高功率驱动装置的节点充电。 耦合到驱动器的第二端子在不同于第一时间长度的第二时间长度上排出节点。
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3.
公开(公告)号:US09143373B2
公开(公告)日:2015-09-22
申请号:US14266153
申请日:2014-04-30
Applicant: Silicon Laboratories Inc.
Inventor: Jeffrey L. Sonntag , Douglas R. Frey , Michael J. Mills , András Vince Horvath , Anantha Nag Nemmani
IPC: H04B1/38 , H04L5/16 , H04L27/156 , H04L25/02
CPC classification number: H04L27/1563 , H04L25/0266 , H04L25/4902
Abstract: An analog signal is transported across an isolation channel using edge modulation/demodulation of a pulse width modulated (PWM) signal. An edge modulator is responsive to rising edges of the PWM signal to generate first pulses having a first predetermined pulse width and is responsive to receipt of falling edges of the PWM signal to generate second pulses having a second predetermined pulse width with the same polarity as the first pulses. On the opposite side of the isolation channel an edge demodulating circuit recreates the PWM signal using the first and second pulses. The rise and falling edges of the PWM signals can be distinguished based on the pulse width of the first and second pulses. A second order pulse width modulator may be used to generate the PWM signal.
Abstract translation: 使用脉冲宽度调制(PWM)信号的边缘调制/解调,模拟信号通过隔离通道传输。 边缘调制器响应于PWM信号的上升沿以产生具有第一预定脉冲宽度的第一脉冲,并且响应于接收到PWM信号的下降沿以产生具有与第二预定脉冲宽度相同极性的第二脉冲 第一脉冲。 在隔离通道的相反侧,边缘解调电路使用第一和第二脉冲重新创建PWM信号。 可以基于第一和第二脉冲的脉冲宽度区分PWM信号的上升沿和下降沿。 可以使用二阶脉冲宽度调制器来产生PWM信号。
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公开(公告)号:US09491394B2
公开(公告)日:2016-11-08
申请号:US14254340
申请日:2014-04-16
Applicant: SILICON LABORATORIES INC.
Inventor: András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
CPC classification number: H04N5/50 , H03J5/24 , H04L25/0292 , H04N5/165 , H04N5/455 , H04N21/42607
Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.
Abstract translation: 在一个实施例中,内部缓冲器可以设置在集成电路(IC)内,以在开关的控制下将信号转换成经由IC的引脚输出的输出电流,该开关可以基于配置设置 IC,并且当IC耦合到外部驱动器电路时,可以选择性地将信号耦合到引脚。
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5.
公开(公告)号:US20150063434A1
公开(公告)日:2015-03-05
申请号:US14266153
申请日:2014-04-30
Applicant: Silicon Laboratories Inc.
Inventor: Jeffrey L. Sonntag , Douglas R. Frey , Michael J. Mills , András Vince Horvath , Anantha Nag Nemmani
IPC: H04L27/156
CPC classification number: H04L27/1563 , H04L25/0266 , H04L25/4902
Abstract: An analog signal is transported across an isolation channel using edge modulation/demodulation of a pulse width modulated (PWM) signal. An edge modulator is responsive to rising edges of the PWM signal to generate first pulses having a first predetermined pulse width and is responsive to receipt of falling edges of the PWM signal to generate second pulses having a second predetermined pulse width with the same polarity as the first pulses. On the opposite side of the isolation channel an edge demodulating circuit recreates the PWM signal using the first and second pulses. The rise and falling edges of the PWM signals can be distinguished based on the pulse width of the first and second pulses. A second order pulse width modulator may be used to generate the PWM signal.
Abstract translation: 使用脉冲宽度调制(PWM)信号的边缘调制/解调,模拟信号通过隔离通道传输。 边缘调制器响应于PWM信号的上升沿以产生具有第一预定脉冲宽度的第一脉冲,并且响应于接收到PWM信号的下降沿以产生具有与第二预定脉冲宽度相同极性的第二脉冲 第一脉冲。 在隔离通道的相反侧,边缘解调电路使用第一和第二脉冲重新创建PWM信号。 可以基于第一和第二脉冲的脉冲宽度区分PWM信号的上升沿和下降沿。 可以使用二阶脉冲宽度调制器来产生PWM信号。
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公开(公告)号:US20140226074A1
公开(公告)日:2014-08-14
申请号:US14254340
申请日:2014-04-16
Applicant: SILICON LABORATORIES INC.
Inventor: András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
CPC classification number: H04N5/50 , H03J5/24 , H04L25/0292 , H04N5/165 , H04N5/455 , H04N21/42607
Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.
Abstract translation: 在一个实施例中,内部缓冲器可以设置在集成电路(IC)内,以在开关的控制下将信号转换成经由IC的引脚输出的输出电流,该开关可以基于配置设置 IC,并且当IC耦合到外部驱动器电路时,可以选择性地将信号耦合到引脚。
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