公开(公告)号：US12272922B2

公开(公告)日：2025-04-08

申请号：US18408149

申请日：2024-01-09

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Fabien Quercia ,  Jean-Michel Riviere

IPC: H01S5/02345 ,  H01L23/00

Abstract: Electronic device comprising a support substrate having a mounting face and an electronic chip having a rear face bonded on the mounting face by a volume of adhesive, wherein the support substrate comprises a plurality of wedging elements projecting from the mounting face so as to hold the chip bearing on contact areas of the wedging elements in a position substantially parallel to the mounting face of the support substrate.

公开(公告)号：US11437306B2

公开(公告)日：2022-09-06

申请号：US17165295

申请日：2021-02-02

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain Coffy ,  Fabien Quercia

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/552 ,  H01L23/66 ,  H01L23/00 ,  H01Q1/22

Abstract: A non-conductive encapsulation cover is mounted on a support face of a support substrate to delimit, with the support substrate, an internal housing. An integrated circuit chip is mounted to the support substrate within the internal housing. A metal pattern is mounted to an internal wall of the non-conductive encapsulation cover in a position facing the support face. At least two U-shaped metal wires are provided within the internal housing, located to a side of the integrated circuit chip, and fixed at one end to the metallic pattern and at another end to the support face.

公开(公告)号：US10224306B2

公开(公告)日：2019-03-05

申请号：US15602278

申请日：2017-05-23

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： David Auchere ,  Asma Hajji ,  Fabien Quercia ,  Jerome Lopez

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31

Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.

公开(公告)号：US20180122770A1

公开(公告)日：2018-05-03

申请号：US15602278

申请日：2017-05-23

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： David Auchere ,  Asma Hajji ,  Fabien Quercia ,  Jerome Lopez

IPC: H01L23/00 ,  H01L23/552 ,  H01L23/31

CPC classification number: H01L24/85 ,  H01L23/3157 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48992 ,  H01L2224/48997 ,  H01L2224/8592

Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.

公开(公告)号：US12288961B2

公开(公告)日：2025-04-29

申请号：US17223649

申请日：2021-04-06

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Fabien Quercia ,  Jean-Michel Riviere

IPC: H01S5/02234 ,  G01S7/481 ,  H01L31/0203 ,  H01L31/0232 ,  H01S5/00 ,  H01S5/0236 ,  H01S5/40

Abstract: An electronic device includes a base substrate having a mounting face. An electronic chip is fastened onto the mounting face of the base substrate. A transparent encapsulation structure is bonded onto the base substrate. The transparent encapsulation structure includes a housing with an internal cavity defining a chamber housing the electronic chip. The encapsulation structure has an external face that supports a light-filtering optical wafer located facing an optical element of the electronic chip. An opaque cover covers the transparent encapsulation structure and includes a local opening facing the light-filtering optical wafer.

公开(公告)号：US12278155B2

公开(公告)日：2025-04-15

申请号：US17523386

申请日：2021-11-10

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Younes Boutaleb ,  Fabien Quercia ,  Asma Hajji ,  Ouafa Hajji

IPC: H01L23/31 ,  H01L23/00

Abstract: A support substrate supports an electronic chip. An encapsulation coating on the support substrate coats the electronic chip. The encapsulation coating includes a trench surrounding the electronic chip. A heat sink is mounted to the encapsulation coating above the electronic chip. The heat sink is fixed to the encapsulation coating by an adhesive material and a thermal interface material layer is present between the electronic chip and the heat sink. The trench is positioned between the thermal interface material layer and the adhesive material.

公开(公告)号：US11916353B2

公开(公告)日：2024-02-27

申请号：US17229710

申请日：2021-04-13

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Fabien Quercia ,  Jean-Michel Riviere

IPC: H01S5/02345 ,  H01L23/00

CPC classification number: H01S5/02345 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/12042 ,  H01L2924/18165

Abstract: Electronic device comprising a support substrate having a mounting face and an electronic chip having a rear face bonded on the mounting face by a volume of adhesive, wherein the support substrate comprises a plurality of wedging elements projecting from the mounting face so as to hold the chip bearing on contact areas of the wedging elements in a position substantially parallel to the mounting face of the support substrate.

公开(公告)号：US12170262B2

公开(公告)日：2024-12-17

申请号：US18081884

申请日：2022-12-15

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： David Auchere ,  Asma Hajji ,  Fabien Quercia ,  Jerome Lopez

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/552

Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.

公开(公告)号：US11817377B2

公开(公告)日：2023-11-14

申请号：US17878436

申请日：2022-08-01

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain Coffy ,  Fabien Quercia

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/552 ,  H01L23/66 ,  H01L23/00 ,  H01Q1/22

CPC classification number: H01L23/49811 ,  H01L21/4817 ,  H01L21/4853 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01Q1/2283 ,  H01L2223/6677 ,  H01L2224/48227

Abstract: A non-conductive encapsulation cover is mounted on a support face of a support substrate to delimit, with the support substrate, an internal housing. An integrated circuit chip is mounted to the support substrate within the internal housing. A metal pattern is mounted to an internal wall of the non-conductive encapsulation cover in a position facing the support face. At least two U-shaped metal wires are provided within the internal housing, located to a side of the integrated circuit chip, and fixed at one end to the metallic pattern and at another end to the support face.

公开(公告)号：US11557566B2

公开(公告)日：2023-01-17

申请号：US16835793

申请日：2020-03-31

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： David Auchere ,  Asma Hajji ,  Fabien Quercia ,  Jerome Lopez

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/552

Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.