公开(公告)号：US08847275B2

公开(公告)日：2014-09-30

申请号：US13796753

申请日：2013-03-12

Applicant: STMicroelectronics S.A.

Inventor： Jean Jimenez ,  Philippe Galy ,  Boris Heitz

IPC: H01L29/417 ,  H01L29/74 ,  H01L31/111 ,  H01L29/72 ,  H01L29/73 ,  H01L23/62 ,  H01L27/02 ,  H01L29/87 ,  H01L29/747

CPC classification number: H01L27/0259 ,  H01L27/0262 ,  H01L29/7436 ,  H01L29/747 ,  H01L29/87

Abstract: The component incorporates, in topological terms, a scalable number of triac structures in a concentric annular arrangement. The component can be used with an electronic device to protect against electrostatic discharges. For example, the components can be used to protect the input/output pad, the first power supply terminal, and the second power supply terminal of an integrated circuit against electrostatic discharges.

Abstract translation: 该组件以拓扑学方式并入具有同步环形布置的可缩放数量的三端双向可控硅结构。 该组件可与电子设备一起使用，以防止静电放电。 例如，这些组件可用于保护集成电路的输入/输出焊盘，第一电源端子和第二电源端子免受静电放电。

公开(公告)号：US08907373B2

公开(公告)日：2014-12-09

申请号：US13628614

申请日：2012-09-27

Applicant: STMicroelectronics S.A.

Inventor： Philippe Galy ,  Jean Jimenez ,  Johan Bourgeat ,  Boris Heitz

IPC: H01L29/74 ,  H01L31/111 ,  H01L29/788 ,  H01L23/62 ,  H01L29/747 ,  H01L27/02

CPC classification number: H01L27/0262 ,  H01L29/747

Abstract: A protection device includes a triac and triggering units. Each triggering unit is formed by a MOS transistor configured to operate at least temporarily in a hybrid operating mode and a field-effect diode. The field-effect diode has a controlled gate that is connected to the gate of the MOS transistor.

Abstract translation: 保护装置包括三端双向可控硅开关元件和触发单元。 每个触发单元由配置成至少在混合操作模式中暂时操作的MOS晶体管和场效应二极管形成。 场效应二极管具有连接到MOS晶体管的栅极的受控栅极。

公开(公告)号：US09368611B2

公开(公告)日：2016-06-14

申请号：US13853111

申请日：2013-03-29

Applicant: STMICROELECTRONICS (CROLLES 2) SAS ,  STMICROELECTRONICS S.A.

Inventor： Philippe Galy ,  Patrice Dehan ,  Boris Heitz ,  Jean Jimenez

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L27/07

CPC classification number: H01L29/78 ,  H01L27/0727 ,  H01L29/41775 ,  H01L29/66553 ,  H01L29/66628 ,  H01L29/66643 ,  H01L29/7839

Abstract: An integrated circuit may include at least one MOS transistor having a sigmoid response. The at least one MOS transistor may include a substrate, a source region, a drain region, a gate region, and insulating spacer regions on either side of the gate region. The substrate may include a first region situated under the gate region between the insulating spacer regions. At least one of the source and drain regions may be separated from the first region of the substrate by a second region of the substrate situated under an insulating spacer region, which may be of a same type of conductivity as the first region of the substrate.

Abstract translation: 集成电路可以包括具有S形响应的至少一个MOS晶体管。 至少一个MOS晶体管可以包括栅极区域的任一侧上的衬底，源极区域，漏极区域，栅极区域和绝缘间隔区域。 衬底可以包括位于绝缘间隔区之间的栅极区域下方的第一区域。 源极和漏极区域中的至少一个可以通过位于绝缘间隔区域下方的衬底的第二区域与衬底的第一区域分离，绝缘间隔区域可以具有与衬底的第一区域相同类型的导电性。

公开(公告)号：US09299668B2

公开(公告)日：2016-03-29

申请号：US13705503

申请日：2012-12-05

Applicant: STMicroelectronics S.A.

Inventor： Johan Bourgeat ,  Philippe Galy

IPC: H02H9/00 ,  H01L23/60 ,  H01L27/02 ,  H02H9/04

CPC classification number: H01L23/60 ,  H01L27/0262 ,  H01L27/0274 ,  H01L27/0296 ,  H01L29/0692 ,  H01L29/747 ,  H01L2924/0002 ,  H02H9/04 ,  H01L2924/00

Abstract: A device for protecting a set of N nodes from electrostatic discharges, wherein N is greater than or equal to three, includes a set of N units respectively possessing N first terminals respectively connected to the N nodes and N second terminals connected together to form a common terminal. Each unit includes at least one MOS transistor including a parasitic transistor connected between a pair of the N nodes and configured, in the presence of a current pulse between the pair of nodes, to operate, at least temporarily, in a hybrid mode including MOS-type operation in a sub-threshold mode and operation of the bipolar transistor.

Abstract translation: 用于保护一组N个节点免受静电放电的装置，其中N大于或等于3，包括分别具有分别连接到N个节点的N个第一终端的N个单元的集合和连接在一起的N个第二终端以形成公共 终奌站。 每个单元包括至少一个MOS晶体管，其包括连接在一对N个节点之间的寄生晶体管，并且在所述一对节点之间存在电流脉冲的情况下，配置为至少临时地以包括MOS- 在亚阈值模式下工作和双极晶体管的工作。

公开(公告)号：US20140097464A1

公开(公告)日：2014-04-10

申请号：US13796753

申请日：2013-03-12

Applicant: STMicroelectronics S.A.

Inventor： Jean Jimenez ,  Philippe Galy ,  Boris Heitz

IPC: H01L27/02

CPC classification number: H01L27/0259 ,  H01L27/0262 ,  H01L29/7436 ,  H01L29/747 ,  H01L29/87

Abstract: The component incorporates, in topological terms, a scalable number of triac structures in a concentric annular arrangement. The component can be used with an electronic device to protect against electrostatic discharges. For example, the components can be used to protect the input/output pad, the first power supply terminal, and the second power supply terminal of an integrated circuit against electrostatic discharges.

Abstract translation: 该组件以拓扑学方式并入具有同步环形布置的可缩放数量的三端双向可控硅结构。 该组件可与电子设备一起使用，以防止静电放电。 例如，这些组件可用于保护集成电路的输入/输出焊盘，第一电源端子和第二电源端子免受静电放电。

公开(公告)号：US20130113017A1

公开(公告)日：2013-05-09

申请号：US13628614

申请日：2012-09-27

Applicant: STMicroelectronics S.A.

Inventor： Philippe Galy ,  Jean Jimenez ,  Johan Bourgeat ,  Boris Heitz

IPC: H01L29/747

CPC classification number: H01L27/0262 ,  H01L29/747

Abstract: A protection device includes a triac and triggering units. Each triggering unit is formed by a MOS transistor configured to operate at least temporarily in a hybrid operating mode and a field-effect diode. The field-effect diode has a controlled gate that is connected to the gate of the MOS transistor.

Abstract translation: 保护装置包括三端双向可控硅开关元件和触发单元。 每个触发单元由配置成至少在混合操作模式中暂时操作的MOS晶体管和场效应二极管形成。 场效应二极管具有连接到MOS晶体管的栅极的受控栅极。

公开(公告)号：US20140124866A1

公开(公告)日：2014-05-08

申请号：US13853111

申请日：2013-03-29

Applicant: STMICROELECTRONICS (CROLLES 2) SAS ,  STMICROELECTRONICS S.A.

Inventor： Philippe Galy ,  Patrice Dehan ,  Boris Heitz ,  Jean Jimenez

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/78 ,  H01L27/0727 ,  H01L29/41775 ,  H01L29/66553 ,  H01L29/66628 ,  H01L29/66643 ,  H01L29/7839

Abstract: An integrated circuit may include at least one MOS transistor having a sigmoid response. The at least one MOS transistor may include a substrate, a source region, a drain region, a gate region, and insulating spacer regions on either side of the gate region. The substrate may include a first region situated under the gate region between the insulating spacer regions. At least one of the source and drain regions may be separated from the first region of the substrate by a second region of the substrate situated under an insulating spacer region, which may be of a same type of conductivity as the first region of the substrate.

Abstract translation: 集成电路可以包括具有S形响应的至少一个MOS晶体管。 至少一个MOS晶体管可以包括栅极区域的任一侧上的衬底，源极区域，漏极区域，栅极区域和绝缘间隔区域。 衬底可以包括位于绝缘间隔区之间的栅极区域下方的第一区域。 源极和漏极区域中的至少一个可以通过位于绝缘间隔区域下方的衬底的第二区域与衬底的第一区域分离，绝缘间隔区域可以具有与衬底的第一区域相同类型的导电性。

公开(公告)号：US20130155558A1

公开(公告)日：2013-06-20

申请号：US13705503

申请日：2012-12-05

Applicant: STMicroelectronics S.A.

Inventor： Johan Bourgeat ,  Philippe Galy

IPC: H02H9/04

CPC classification number: H01L23/60 ,  H01L27/0262 ,  H01L27/0274 ,  H01L27/0296 ,  H01L29/0692 ,  H01L29/747 ,  H01L2924/0002 ,  H02H9/04 ,  H01L2924/00

Abstract: A device for protecting a set of N nodes from electrostatic discharges, wherein N is greater than or equal to three, includes a set of N units respectively possessing N first terminals respectively connected to the N nodes and N second terminals connected together to form a common terminal. Each unit includes at least one MOS transistor including a parasitic transistor connected between a pair of the N nodes and configured, in the presence of a current pulse between the pair of nodes, to operate, at least temporarily, in a hybrid mode including MOS-type operation in a sub-threshold mode and operation of the bipolar transistor.

Abstract translation: 用于保护一组N个节点免受静电放电的装置，其中N大于或等于3，包括分别具有分别连接到N个节点的N个第一终端的N个单元的集合和连接在一起的N个第二终端以形成公共 终奌站。 每个单元包括至少一个MOS晶体管，其包括连接在一对N个节点之间的寄生晶体管，并且在所述一对节点之间存在电流脉冲的情况下，配置为至少临时地以包括MOS- 在亚阈值模式下工作和双极晶体管的工作。