Power management architecture based on microprocessor architecture with embedded and external non-volatile memory
    1.
    发明授权
    Power management architecture based on microprocessor architecture with embedded and external non-volatile memory 有权
    基于具有嵌入式和外部非易失性存储器的微处理器架构的电源管理架构

    公开(公告)号:US09454215B2

    公开(公告)日:2016-09-27

    申请号:US13907543

    申请日:2013-05-31

    Abstract: A control unit for power supply circuits of points of load (POL) of an electronic system includes a means for autonomous customization by the customer-user of the original control program residing in the ROM of the device, as well as configuration of control parameters of the POL. Microprocessor architecture of the device includes a dedicated logic block and a rewritable non-volatile memory coupled to the data bus of the device or to an auxiliary bus thereof, thus providing a means for software extension of the power supply circuits. RAM is loaded at start-up with data of modified or added routines for implementing new commands and values of configuration and control data of the POL. The RAM may optionally be subjected to encryption/decryption for protection. During operation, program execution jumps from ROM address space to RAM address space and vice versa when certain values of a program counter are reached.

    Abstract translation: 用于电子系统的负载点(POL)的供电电路的控制单元包括客户用户自己定制驻留在设备的ROM中的原始控制程序的装置,以及控制参数的配置 POL。 设备的微处理器架构包括专用逻辑块和耦合到设备的数据总线或其辅助总线的可重写非易失性存储器,从而提供用于电源电路的软件扩展的装置。 RAM在启动时加载了修改或添加的例程的数据,用于实现POL的配置和控制数据的新命令和值。 RAM可以可选地进行加密/解密以进行保护。 在操作过程中,当达到程序计数器的某些值时,程序执行从ROM地址空间跳转到RAM地址空间,反之亦然。

    ADAPTIVE REACTIVATION OF PHASES DEACTIVATED BY PHASE-SHEDDING IN MULTI-PHASE VOLTAGE REGULATORS
    2.
    发明申请
    ADAPTIVE REACTIVATION OF PHASES DEACTIVATED BY PHASE-SHEDDING IN MULTI-PHASE VOLTAGE REGULATORS 有权
    在多相电压调节器中通过相位剥离消除的相位的自适应反应

    公开(公告)号:US20140062430A1

    公开(公告)日:2014-03-06

    申请号:US14014896

    申请日:2013-08-30

    Abstract: In a multi-phase power supply voltage regulator functioning at a nominal switching frequency, one or more phases are kept off for optimizing energy efficiency at relatively low load conditions. Reactivation of stand-by phases in response to a load increase transient is made more efficiently by exploiting information already present in the output voltage control loop. The technique comprises a) deriving from the control loop information on the equivalent nominal switching frequency given by the product of the nominal switching frequency by the number of active phases; b) updating at every beat of a clock signal the instantaneous value of the equivalent switching frequency; c) determining the band of equivalent switching frequency values to which the instantaneous value belongs; d) logically combining the equivalent switching frequency information with a determined band of output current level, for switching on one or more stand-by phases in response to a load increase transient.

    Abstract translation: 在标称开关频率下工作的多相电源电压调节器中,一个或多个相位被保持关闭,以在相对低的负载条件下优化能量效率。 通过利用已经存在于输出电压控制回路中的信息,更有效地重新启动响应于负载增加瞬态的待机阶段。 该技术包括:a)从控制环路得出关于由标称开关频率乘积给出的等效标称开关频率与有效相位数的信息; b)在时钟信号的每个节拍上更新等效开关频率的瞬时值; c)确定瞬时值所属的等效开关频率值的频带; d)将等效开关频率信息与确定的输出电流电平的频带进行逻辑组合,以响应于负载增加瞬态来接通一个或多个待机阶段。

Patent Agency Ranking