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公开(公告)号:US20230335524A1
公开(公告)日:2023-10-19
申请号:US18334280
申请日:2023-06-13
Applicant: STMicroelectronics S.r.l.
Inventor: Angelo SCUDERI , Nicola MARINELLI
IPC: H01L23/00 , H01L23/538 , H01L23/66 , H01L25/065 , H01L25/10
CPC classification number: H01L24/17 , H01L23/5386 , H01L23/66 , H01L24/14 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/105 , H01L2223/6627 , H01L2223/6677 , H01L2223/6683 , H01L2224/14133 , H01L2224/16225 , H01L2224/17133 , H01L2224/48105 , H01L2224/48225 , H01L2224/73257 , H01L2924/1423
Abstract: An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.
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公开(公告)号:US20210242157A1
公开(公告)日:2021-08-05
申请号:US17162595
申请日:2021-01-29
Applicant: STMicroelectronics S.r.l.
Inventor: Angelo SCUDERI , Nicola MARINELLI
IPC: H01L23/00 , H01L23/538 , H01L23/66 , H01L25/065 , H01L25/10
Abstract: An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.
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公开(公告)号:US20210242116A1
公开(公告)日:2021-08-05
申请号:US17158776
申请日:2021-01-26
Applicant: STMicroelectronics S.r.l.
Inventor: Angelo SCUDERI , Nicola MARINELLI
IPC: H01L23/498 , H01L23/00 , H01L23/66 , H01L23/14 , H04W56/00
Abstract: An integrated circuit includes a semiconductor substrate, electronic components integrated in the semiconductor substrate, an electric connection structure overlying the semiconductor substrate, and an conductive region, with elongated shaped, having a first and a second end. The conductive region is formed in the electric connection structure, extends over an entire length of the substrate and is not directly electrically connected to the electronic components. A first and a second synchronization connection element are electrically coupled to the first end and to the second end, respectively, of the conductive region and have each a respective synchronization connection portion facing the coupling face.
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