公开(公告)号：US20010023094A1

公开(公告)日：2001-09-20

申请号：US09752149

申请日：2000-12-29

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe D'Arrigo ,  Corrado Spinella ,  Salvatore Coffa ,  Giuseppe Arena ,  Marco Camalleri

IPC: H01L021/8238

CPC classification number: H01L21/3063 ,  C25F3/12 ,  H01L21/31662 ,  H01L21/32105 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76286

Abstract: A method for fabricating a silicon-on-insulator (SOI) wafer that includes a monocrystalline silicon substrate with a doped region buried therein is provided. The method includes forming a plurality of trench-like openings extending from a surface of the substrate to the doped buried region, and selectively etching through the plurality of trench-like openings to change the doped buried region into a porous silicon region. The porous silicon region is oxidized to obtain an insulating region for the SOI wafer.

Abstract translation: 提供一种制造绝缘体上硅（SOI）晶片的方法，该方法包括其中埋有掺杂区的单晶硅衬底。 该方法包括形成从衬底的表面延伸到掺杂掩埋区的多个沟槽状开口，并且选择性地蚀刻穿过多个沟槽状开口以将掺杂掩埋区改变为多孔硅区。 多孔硅区域被氧化以获得用于SOI晶片的绝缘区域。

公开(公告)号：US20040248349A1

公开(公告)日：2004-12-09

申请号：US10726005

申请日：2003-12-01

Applicant: STMicroelectronics S.r.l.

Inventor： Crocifisso Marco Antonio Renna ,  Luigi La Magna ,  Simona Lorenti ,  Salvatore Coffa

IPC: H01L021/336

CPC classification number: B81C1/00047 ,  B81B2201/0257 ,  B81C2201/0115 ,  B81C2201/0116 ,  H01L21/302 ,  H01L21/306 ,  H01L21/76243 ,  H01L21/764 ,  H01L29/0649 ,  H04R19/005

Abstract: A method for manufacturing a semiconductor substrate of a first concentration type is described, which comprises at least a buried insulating cavity, comprising the following steps: forming on the semiconductor substrate a plurality of trenches, forming a surface layer on the semiconductor substrate in order to close superficially the plurality of trenches forming in the meantime at least a buried cavity in correspondence with the surface-distal end of the trenches.

Abstract translation: 描述了一种用于制造第一浓缩型半导体衬底的方法，至少包括掩埋绝缘腔，包括以下步骤：在半导体衬底上形成多个沟槽，在半导体衬底上形成表面层，以便 在表面上紧密地闭合形成与沟槽的表面 - 远端相对应的至少一个掩埋腔的多个沟槽。

公开(公告)号：US20030003347A1

公开(公告)日：2003-01-02

申请号：US10147353

申请日：2002-05-16

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe D'Arrigo ,  Salvatore Coffa ,  Rosario Corrado Spinella

IPC: H01M004/86 ,  H01M008/10 ,  H01M004/92 ,  B05D005/12 ,  H01M004/88

CPC classification number: H01M8/241 ,  H01M8/1004 ,  H01M8/1007 ,  H01M2300/0082

Abstract: A fuel cell for an electrical load circuit includes a first monocrystalline silicon substrate and a positive half-cell formed therein, and a second monocrystalline silicon substrate and a positive half-cell formed therein. Each half-cell includes a microporous catalytic electrode permeable to a gas and connectable to the electrical load circuit. A cell area is defined on a surface of each respective monocrystalline silicon substrate, and includes a plurality of parallel trenches formed therein for receiving the gas to be fed to the respective microporous catalytic electrode. A cation exchange membrane separates the two microporous catalytic electrodes. Each half-cell includes a passageway for feeding the respective gas to the corresponding microporous catalytic electrode.

Abstract translation: 用于电负载电路的燃料电池包括第一单晶硅衬底和形成在其中的正半电池，以及形成在其中的第二单晶硅衬底和正半电池。 每个半电池包括可渗透气体并可连接到电负载电路的微孔催化电极。 在每个单晶硅衬底的表面上限定一个单元区域，并且包括多个平行的沟槽，用于接收要供给到各个微孔催化电极的气体。 阳离子交换膜分离两个微孔催化电极。 每个半电池包括用于将相应的气体供给到相应的微孔催化电极的通道。

公开(公告)号：US20020151100A1

公开(公告)日：2002-10-17

申请号：US10014880

申请日：2001-12-11

Applicant: STMicroelectronics S.r.l.

Inventor： Salvatore Coffa ,  Luigi Occhipinti

IPC: H01L021/00 ,  H01L021/76 ,  H01L029/82

CPC classification number: B81C1/00182 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0109 ,  B81C2201/0115 ,  G01L9/0042

Abstract: Abstract of the Disclosure A monolithically integrated pressure sensor is produced through micromechanical surface structure definition techniques. A microphone cavity in the semiconductor substrate may be monolithically formed by plasma etching the front side or the back side of the silicon wafer to cut a plurality of trenches or holes deep enough to extend for at least part of its thickness into a doped buried layer of opposite type of conductivity of the substrate and of the epitaxial layer grown over it. The method may also include electrochemically etching through such trenches, the silicon of the buried layer with an electrolytic solution suitable for selectively etching the doped silicon of the opposite type of conductivity, thereby making the silicon of the buried layer porous. The method may also include oxidizing and leaching away the silicon so made porous.

Abstract translation: 公开的摘要通过微机械表面结构定义技术制造单片集成的压力传感器。 半导体衬底中的麦克风腔可以通过等离子体蚀刻硅晶片的前侧或背面来整体地形成，以切割多个深度足够的沟槽或孔，以使其厚度的至少一部分延伸到 衬底和在其上生长的外延层的相反类型的导电性。 该方法还可以包括通过这样的沟槽电化学蚀刻掩埋层的硅，其中电解溶液适于选择性地蚀刻具有相反导电性的掺杂硅，从而使掩埋层的硅多孔化。 该方法还可以包括氧化和浸出如此制成的多孔的硅。

公开(公告)号：US20020017657A1

公开(公告)日：2002-02-14

申请号：US09811159

申请日：2001-03-15

Applicant: STMicroelectronics S.r.l.

Inventor： Salvatore Coffa ,  Davide Patti

IPC: H01L031/072

CPC classification number: H01L21/28273 ,  Y10S438/962

Abstract: A process for forming a thin layer of Silicon nanocrystals in an oxide layer is disclosed. The process includes, on a semiconductive substrate, thermally oxidizing a first portion of the substrate into an oxide layer, forming Silicon ions within the layer of oxide, and thermally treating the Silicon ions to become the thin layer of Silicon nanocrystals. In the inventive process the formation of the Silicon ions is by ionic implantation of the Silicon ions into the oxide at an ionization energy of between 0.1 keV and 7 keV, and preferably between 1 and 5 keV. This allows the Silicon atoms to coalesce in a lower temperature than would otherwise be possible. Additionally, more than one layer of nanocrystals can be formed by performing more than one implantation at more than one energy level. Embodiments of the invention can be used to form non-volatile memory devices with a very high quality having a very small size.

Abstract translation: 公开了一种在氧化物层中形成硅纳米晶体薄层的工艺。 该方法包括在半导体衬底上将衬底的第一部分热氧化成氧化物层，在氧化物层内形成硅离子，以及热处理硅离子以成为硅纳米晶体的薄层。 在本发明的方法中，硅离子的形成是通过以0.1keV至7keV，优选1至5keV之间的离子化能量将硅离子离子注入氧化物中。 这允许硅原子在比其他可能的温度更低的温度下聚结。 另外，可以通过在多于一个能级执行多于一次的注入来形成多于一层的纳米晶体。 本发明的实施例可用于形成具有非常小尺寸的非常高质量的非易失性存储器件。