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公开(公告)号：US20150286238A1
公开(公告)日：2015-10-08
申请号：US14675309
申请日：2015-03-31
Inventor： Jean-Pierre Blanc , Pratap Narayan Singh
IPC: G05F3/16
Abstract: A reference voltage generation circuit, including a first current source in series with a first bipolar transistor; a second current source in series with a first resistor; a third current source in series with a second bipolar transistor, the third current source being assembled as a current mirror with the first current source; a second resistor between the base of the second bipolar transistor and the junction point between the current source and the first resistor; and a fourth current source in series with a third resistor, the junction point between the fourth current source and the third resistor defining a reference voltage terminal.
Abstract translation: 参考电压产生电路，包括与第一双极晶体管串联的第一电流源; 与第一电阻器串联的第二电流源; 与第二双极晶体管串联的第三电流源，所述第三电流源被组装为具有所述第一电流源的电流镜; 第二电阻器，位于第二双极晶体管的基极与电流源与第一电阻之间的连接点之间; 以及与第三电阻器串联的第四电流源，所述第四电流源和所述第三电阻器之间的连接点限定参考电压端子。
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公开(公告)号：US09588538B2
公开(公告)日：2017-03-07
申请号：US14675309
申请日：2015-03-31
Inventor： Jean-Pierre Blanc , Pratap Narayan Singh
Abstract: A reference voltage generation circuit, including a first current source in series with a first bipolar transistor; a second current source in series with a first resistor; a third current source in series with a second bipolar transistor, the third current source being assembled as a current mirror with the first current source; a second resistor between the base of the second bipolar transistor and the junction point between the current source and the first resistor; and a fourth current source in series with a third resistor, the junction point between the fourth current source and the third resistor defining a reference voltage terminal.
Abstract translation: 参考电压产生电路，包括与第一双极晶体管串联的第一电流源; 与第一电阻器串联的第二电流源; 与第二双极晶体管串联的第三电流源，所述第三电流源被组装为具有所述第一电流源的电流镜; 第二电阻器，位于第二双极晶体管的基极与电流源与第一电阻之间的连接点之间; 以及与第三电阻器串联的第四电流源，所述第四电流源和所述第三电阻器之间的连接点限定参考电压端子。
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Patent Agency Ranking
公开(公告)号：US20180254753A1
公开(公告)日：2018-09-06
申请号：US15683236
申请日：2017-08-22
Applicant: STMicroelectronics SA
Inventor： Jean-Pierre Blanc , Severin Trochut
CPC classification number: H03F1/302 , G05F3/30 , H03F1/0205 , H03F3/04 , H03F2200/447
Abstract: A voltage or current generator has a configurable temperature coefficient and includes a first voltage generator that generates a first voltage having a first negative temperature coefficient. A second voltage generator generates a second voltage having a second negative temperature coefficient different to the first negative temperature coefficient. A circuit generates an output level based on the difference between the first voltage scaled by a first scale factor and the second voltage scaled by a second scale factor.
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公开(公告)号：US11005490B2
公开(公告)日：2021-05-11
申请号：US16918940
申请日：2020-07-01
Applicant: STMicroelectronics SA , STMicroelectronics (Alps) SAS
Inventor： Stéphane Le Tual , David Duperray , Jean-Pierre Blanc
Abstract: A sampling circuit includes a metal oxide semiconductor (MOS) transistor that includes a third metallization receiving a reference voltage between a first metallization coupled to a source region of the transistor and a second metallization coupled to a drain region of the transistor.
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公开(公告)号：US20210006256A1
公开(公告)日：2021-01-07
申请号：US16918940
申请日：2020-07-01
Applicant: STMicroelectronics SA , STMicroelectronics (Alps) SAS
Inventor： Stéphane Le Tual , David Duperray , Jean-Pierre Blanc
Abstract: A sampling circuit includes a metal oxide semiconductor (MOS) transistor that includes a third metallization receiving a reference voltage between a first metallization coupled to a source region of the transistor and a second metallization coupled to a drain region of the transistor.
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公开(公告)号：US10355649B2
公开(公告)日：2019-07-16
申请号：US15683236
申请日：2017-08-22
Applicant: STMicroelectronics SA
Inventor： Jean-Pierre Blanc , Severin Trochut
Abstract: A voltage or current generator has a configurable temperature coefficient and includes a first voltage generator that generates a first voltage having a first negative temperature coefficient. A second voltage generator generates a second voltage having a second negative temperature coefficient different to the first negative temperature coefficient. A circuit generates an output level based on the difference between the first voltage scaled by a first scale factor and the second voltage scaled by a second scale factor.
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公开(公告)号：US10917106B2
公开(公告)日：2021-02-09
申请号：US16709391
申请日：2019-12-10
Applicant: STMicroelectronics SA , STMicroelectronics (Alps) SAS
Inventor： Stephane Le Tual , Jean-Pierre Blanc , David Duperray
Abstract: An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.
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