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公开(公告)号：US10917106B2
公开(公告)日：2021-02-09
申请号：US16709391
申请日：2019-12-10
Applicant: STMicroelectronics SA , STMicroelectronics (Alps) SAS
Inventor： Stephane Le Tual , Jean-Pierre Blanc , David Duperray
Abstract: An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.
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公开(公告)号：US09698815B1
公开(公告)日：2017-07-04
申请号：US15237767
申请日：2016-08-16
Applicant: STMicroelectronics SA
Inventor： Mounir Boulemnakher , Stephane Le Tual
Abstract: A multiplying digital to analog converter includes first and second inputs for receiving first and second differential input signals. A differential amplifier has first and second differential input nodes and first and second differential output nodes. A first capacitor is coupled in series with a first switch between the first differential input node and the first input. The first capacitor is further coupled to at least one reference voltage supply node via one or more further switches. A second capacitor is coupled between the first differential input node and the first differential output node. A third capacitor is coupled between the first differential input node and the first input.
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公开(公告)号：US20180152179A1
公开(公告)日：2018-05-31
申请号：US15605536
申请日：2017-05-25
Applicant: STMicroelectronics SA
Inventor： Hanae Zegmout , Denis Pache , Stephane Le Tual
IPC: H03K3/42
Abstract: The present disclosure relates to a device for converting an optical pulse to an electronic pulse includes a photoresistor having first and second terminals and being capable of receiving a pulsed laser signal arising from a mode-locked laser source The first terminal is linked to a node for applying a reference potential via a resistive element and a capacitive element connected in parallel. The second terminal is connected to a node for applying a supply potential.
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公开(公告)号：US10972097B2
公开(公告)日：2021-04-06
申请号：US16643383
申请日：2017-08-29
Applicant: STMicroelectronics SA
Inventor： Hanae Zegmout , Denis Pache , Stephane Le Tual , Jean-François Roux , Jean-Louis Coutaz
IPC: H03K17/78 , H01L31/08 , H01L31/028 , H01L31/0352 , H03M1/12
Abstract: In accordance with an embodiment of the present invention, an optical switch includes a photoconductor body including a first edge and an opposite second edge, a first end and an opposite second end. The first edge is configured to receive an electrical input signal and the second edge is configured to deliver an electrical output signal. The photoconductor body is configured to have an electrically ON state that is activated by an optical signal and an electrically OFF state that is activated by an absence of the optical signal. A direction from the first end to the second end defines a longitudinal direction. The direction from the first edge to the second edge defines a first direction that is orthogonal to the longitudinal direction. A first dimension between the first edge and the second edge along the first direction decreases from the first end to the second end.
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Patent Agency Ranking
公开(公告)号：US10312889B2
公开(公告)日：2019-06-04
申请号：US15605541
申请日：2017-05-25
Applicant: STMicroelectronics SA
Inventor： Denis Pache , Stephane Le Tual , Hanae Zegmout
Abstract: The present disclosure relates to a device for generating a clock signal including a first photoresistor coupling a capacitive output node to a node receiving a first potential. A second photoresistor couples the capacitive node to a node receiving a second potential. The first and second photoresistors receive the same optical pulses of a mode-locked laser at instants in time offset by a first delay.
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公开(公告)号：US10305456B2
公开(公告)日：2019-05-28
申请号：US15605536
申请日：2017-05-25
Applicant: STMicroelectronics SA
Inventor： Hanae Zegmout , Denis Pache , Stephane Le Tual
Abstract: The present disclosure relates to a device for converting an optical pulse to an electronic pulse includes a photoresistor having first and second terminals and being capable of receiving a pulsed laser signal arising from a mode-locked laser source The first terminal is linked to a node for applying a reference potential via a resistive element and a capacitive element connected in parallel. The second terminal is connected to a node for applying a supply potential.
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公开(公告)号：US20200350910A1
公开(公告)日：2020-11-05
申请号：US16643383
申请日：2017-08-29
Applicant: STMicroelectronics SA , Université Savoie Mont Blanc
Inventor： Hanae Zegmout , Denis Pache , Stephane Le Tual , Jean-François Roux , Jean-Louis Coutaz
IPC: H03K17/78 , H01L31/028 , H01L31/0352 , H01L31/08
Abstract: In accordance with an embodiment of the present invention, an optical switch includes a photoconductor body including a first edge and an opposite second edge, a first end and an opposite second end. The first edge is configured to receive an electrical input signal and the second edge is configured to deliver an electrical output signal. The photoconductor body is configured to have an electrically ON state that is activated by an optical signal and an electrically OFF state that is activated by an absence of the optical signal. A direction from the first end to the second end defines a longitudinal direction. The direction from the first edge to the second edge defines a first direction that is orthogonal to the longitudinal direction. A first dimension between the first edge and the second edge along the first direction decreases from the first end to the second end.
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公开(公告)号：US20180152180A1
公开(公告)日：2018-05-31
申请号：US15605541
申请日：2017-05-25
Applicant: STMicroelectronics SA
Inventor： Denis Pache , Stephane Le Tual , Hanae Zegmout
CPC classification number: H03K3/42 , G06F1/105 , H01L31/08 , H03K3/36 , H03M1/1255
Abstract: The present disclosure relates to a device for generating a clock signal including a first photoresistor coupling a capacitive output node to a node receiving a first potential. A second photoresistor couples the capacitive node to a node receiving a second potential. The first and second photoresistors receive the same optical pulses of a mode-locked laser at instants in time offset by a first delay.
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公开(公告)号：US20170288781A1
公开(公告)日：2017-10-05
申请号：US15083616
申请日：2016-03-29
Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics SA
Inventor： Jean-Francois Carpentier , Patrick Lemaitre , Jean-Robert Manouvrier , Denis Pache , Stephane Le Tual
IPC: H04B10/516 , H04L25/49
CPC classification number: H04B10/541 , G02F1/0121 , G02F1/2257 , H04B10/505 , H04L25/4917
Abstract: An optical modulator includes an optical waveguide including at least a first PN junction phase shifter and a second PN junction phase shifter. A driver circuit drives operation of the first and second PN junction phase shifters in response to a pulse amplitude modulated (PAM) analog signal having 2n levels. The PAM analog signal is generated by a digital to analog converter that receives an n-bit input signal. In an implementation, the optical waveguide and PN junction phase shifters are formed on a first integrated circuit chip and the driver circuit is formed on a second integrated circuit chip that is stacked on and electrically connected to the first integrated circuit chip.
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