-
公开(公告)号:US11670215B2
公开(公告)日:2023-06-06
申请号:US17011967
申请日:2020-09-03
Applicant: Samsung Display Co., Ltd.
Inventor: Soo Yeon Kim , Tae Gon Im , Hee-Jeong Seo
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0275 , G09G2310/061
Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.
-
公开(公告)号:US12165565B2
公开(公告)日:2024-12-10
申请号:US17902574
申请日:2022-09-02
Applicant: Samsung Display Co., LTD.
Inventor: Tae Gon Im , Jong Jae Lee , Soo Yeon Kim , Jun Pyo Lee
IPC: G09G3/00 , G09G3/20 , G09G3/3233 , G09G3/3291
Abstract: A display device includes a display panel including data lines, line capacitors respectively connected to the data lines, and pixels receiving a data voltage from the data lines, and a data driver supplying the data voltage to the pixels through the data lines and supplying different charging voltages respectively to the line capacitors through the data line. The data driver senses voltage change of at least one of the data lines occurring in case that at least one of the line capacitors is charged or discharged.
-
公开(公告)号:US11847959B2
公开(公告)日:2023-12-19
申请号:US17751122
申请日:2022-05-23
Applicant: Samsung Display Co., LTD.
Inventor: Dae Gwang Jang , Soo Yeon Kim
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/043 , G09G2300/0819 , G09G2310/0251 , G09G2310/0278 , G09G2320/029 , G09G2320/045
Abstract: A display panel includes pixels connected to first and second data lines and a readout line. The data driver supplies data signals to the first and second data lines and supplies an initialization voltage to the readout line. Each of the pixels includes at least one light emitting element and a driving transistor. The driving transistor controls an amount of current based on a difference between a corresponding data signal among the data signals and an initialization voltage. In a sensing mode, the data driver supplies a test voltage to the first data line and a first off voltage to the second data line in a first period and supplies a second off voltage to the second data line in a second period after the first period. The second off voltage is different from the test voltage and the first off voltage.
-
公开(公告)号:US11657768B2
公开(公告)日:2023-05-23
申请号:US17670621
申请日:2022-02-14
Applicant: Samsung Display Co., LTD.
Inventor: Soo Yeon Kim , Tae Gon Im , Jong Jae Lee , Jun Pyo Lee
IPC: G09G3/3275 , G09G3/3233
CPC classification number: G09G3/3275 , G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , G09G2320/0233 , G09G2320/0295 , G09G2320/045 , G09G2340/0435
Abstract: A display device includes a display panel including a pixel including a light emitting element emitting light and electrically connected to a data line and a sensing line, a timing controller varying a driving frequency of the display panel based on an input frequency of digital video data, and a data driver supplying a data voltage to the data line based on the digital video data during a data addressing period of a frame period and receiving a sensing signal from the sensing line during a sensing period. The data driver electrically connects the sensing line to an initialization voltage line during the data addressing period in case that the digital video data is changed, and electrically connects the sensing line to a high impedance during the data addressing period in case that the digital video data is not changed.
-
公开(公告)号:US20210280125A1
公开(公告)日:2021-09-09
申请号:US17011967
申请日:2020-09-03
Applicant: Samsung Display Co., Ltd.
Inventor: Soo Yeon Kim , Tae Gon Im , Hee-Jeong Seo
IPC: G09G3/20
Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.
-
公开(公告)号:US11107385B2
公开(公告)日:2021-08-31
申请号:US16938329
申请日:2020-07-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Soo Yeon Kim , Ji Ye Lee , Hee Jeong Seo , Tae Gon Im , Jung Hwan Cho
IPC: G09G3/20
Abstract: A display device includes a timing controller which supplies a clock training signal through a data clock signal line and a first control signal through a shared signal line in a first period of one frame, and supplies image data through the data clock signal line in a second period of the one frame, a data driver provided with data driving circuits which generate a clock signal based on the clock training signal and the first control signal in the first period, and generate data voltages based on the clock signal and the image data in the second period, and a pixel part which receives the data voltages from the data driver. The data driver may supply a second control signal indicating a reception state of the data driver to the timing controller through the shared signal line in the second period.
-
公开(公告)号:US12008948B2
公开(公告)日:2024-06-11
申请号:US17739807
申请日:2022-05-09
Applicant: Samsung Display Co., LTD.
Inventor: Soo Yeon Kim , Tae Gon Im , Jong Jae Lee , Dae Gwang Jang
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2300/0842 , G09G2320/0233 , G09G2320/0295 , G09G2330/028
Abstract: A display device includes pixels; a sensing block generating first sensing data during a first sensing period, and generating second sensing data and third sensing data during a second sensing period; and a timing controller compensating first image data with second image data based on the first sensing data, the second sensing data, and the third sensing data. The sensing block generates the first sensing data corresponding to an initial channel voltage applied to each of sensing channels and at least one auxiliary sensing channel during the first sensing period, generates the second sensing data by sensing characteristic information of the pixels corresponding to an initialization voltage applied to the pixels during the second sensing period, and generates the third sensing data corresponding to a reference voltage applied to the at least one auxiliary sensing channel during the second sensing period.
-
公开(公告)号:US11715414B2
公开(公告)日:2023-08-01
申请号:US17731125
申请日:2022-04-27
Applicant: Samsung Display Co., LTD.
Inventor: Soo Yeon Kim , Dae Gwang Jang
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2330/021
Abstract: A display device includes: a display panel including pixels, first to N-th gate integrated circuits (GICs) embedded in gate circuit boards and configured to output gate signals to the pixels, a first gate input power line and a first gate input signal line formed to pass through the gate circuit boards and connected to the GICs, a first feedback power line connected to the first gate input power line, a power supply configured to output a first gate input voltage to the first gate input power line, a first compensator configured to output a first compensation signal in response to a first feedback voltage from the first feedback power line, and a controller configured to output a first gate control signal to the first gate input signal line and output a power control signal to the power supply in response to the first compensation signal.
-
公开(公告)号:US10140900B2
公开(公告)日:2018-11-27
申请号:US15018044
申请日:2016-02-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Won Tae Kim , Soo Yeon Kim , Young Il Ban , Sun Kyu Son
Abstract: A data driver includes a gamma unit, a digital-to-analog converter, and an output buffer. The gamma unit receives at least one reference voltage, and generates a first gamma reference voltage corresponding to a first sub-pixel and a second gamma reference voltage corresponding to a second sub-pixel using the received at least one reference voltage. The digital-to-analog converter receives the first and second gamma reference voltages from the gamma unit, and generates a first gamma data value corresponding to the first sub-pixel using the first gamma reference voltage and a second gamma data value corresponding to the second sub-pixel using the second gamma reference voltage. The output buffer outputs a first frame including the first gamma data value and a second frame including the second gamma data value. The output buffer outputs the first and second frames in a repeated manner for every predetermined number of frames.
-
公开(公告)号:US11790857B2
公开(公告)日:2023-10-17
申请号:US17741766
申请日:2022-05-11
Applicant: Samsung Display Co., LTD.
Inventor: Soo Yeon Kim , Tae Gon Im , Jong Jae Lee , Dae Gwang Jang
IPC: G09G3/3275
CPC classification number: G09G3/3275 , G09G2310/0291 , G09G2310/0297 , G09G2310/08
Abstract: A display device includes a display panel including data lines and pixels electrically connected to the data lines. The data driver supplies data signals to the data lines. The data driver includes: a first output buffer electrically connected to a first data line of the data lines, the first output buffer outputting a first data signal to the first data line; and a first comparator electrically connected to an output terminal of the first output buffer, the first comparator comparing a first slew rate of the first data signal with a first reference slew rate.
-
-
-
-
-
-
-
-
-