公开(公告)号：US09159883B2

公开(公告)日：2015-10-13

申请号：US13761396

申请日：2013-02-07

Applicant: Samsung Display Co., Ltd.

Inventor： Kyung-Suk Jung ,  KyoungTai Han

IPC: G02F1/1343 ,  H01L33/48 ,  G02F1/1337 ,  G02F1/139

CPC classification number: H01L33/48 ,  G02F1/133707 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/1393

Abstract: An array substrate includes a gate line, a data line insulated from and crossing the gate line, and a pixel connected to the gate line and the data line. The pixel includes at least one thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor. The pixel electrode includes a trunk portion having a cross shape and a plurality of branch portions inclined to the trunk portion and spaced apart from each other. Each branch portion includes a first area extended from the trunk portion and a second area extended from the first area, and the second area has a width greater than a width of the first area.

Abstract translation: 阵列基板包括栅极线，与栅极线绝缘并与栅极线交叉的数据线，以及连接到栅极线和数据线的像素。 像素包括连接到栅极线和数据线的至少一个薄膜晶体管，以及连接到薄膜晶体管的像素电极。 像素电极包括具有十字形状的主体部分和与主体部分倾斜并彼此间隔开的多个分支部分。 每个分支部分包括从主体部分延伸的第一区域和从第一区域延伸的第二区域，并且第二区域具有大于第一区域的宽度的宽度。

公开(公告)号：US09934737B2

公开(公告)日：2018-04-03

申请号：US14677225

申请日：2015-04-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyung-Suk Jung ,  Sung-Ryul Kim ,  Woo-Sung Sohn

IPC: G09G5/10 ,  G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3611 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2300/0876 ,  G09G2310/0275 ,  G09G2310/0281 ,  G09G2310/08 ,  G09G2320/0209 ,  G09G2320/0242 ,  G09G2320/041 ,  G09G2330/028

Abstract: A display apparatus includes a display panel comprising a plurality of pixels, each of the pixels comprising a thin film transistor connected to a gate line and a data line and a display element connected to the thin film transistor, a driving voltage generator configured to generate a gate-on voltage and a plurality of gate-off voltages, a timing controller configured to divide an initial driving period into a plurality of setting periods and output a gate-off voltage corresponding to each of the setting periods, and a gate driver circuit configured to generate a gate signal using the gate-on voltage and the gate-off voltage corresponding to a setting period and output the gate signal to the gate line.

公开(公告)号：US09625780B2

公开(公告)日：2017-04-18

申请号：US14562305

申请日：2014-12-05

Applicant: Samsung Display Co., Ltd.

Inventor： Kang-Young Lee ,  Hong Min Yoon ,  Ho Jun Lee ,  Youn Hak Jeong ,  Seung Ki Song ,  Doo Hwan You ,  Sung-Jin Lee ,  Kyung-Suk Jung

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: G02F1/136286 ,  G02F1/134309 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/13624 ,  G02F2001/134345

Abstract: A liquid crystal display according to an exemplary embodiment of the present invention includes: a first substrate, a plurality of signal lines positioned on the first substrate, a pixel electrode connected to the signal lines, and a contact hole exposing a portion of the signal line, wherein the pixel electrode includes a cross-shaped stem, a plurality of branch electrodes extending from the cross-shaped stem, and an edge stem connecting the plurality of branch electrodes at an edge of the pixel electrode, and the edge stem of the pixel electrode adjacent to the contact hole being removed.